提交 10e8e1fb 编写于 作者: A Andrew Victor 提交者: Russell King

[ARM] 3581/1: AT91RM9200 Internal SRAM

Patch from Andrew Victor

This patch maps the AT91RM9200's internal SRAM into the virtual memory
address space - just below the internal peripheral registers.
Signed-off-by: NAndrew Victor <andrew@sanpeople.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
上级 2a6f9902
......@@ -17,6 +17,7 @@
#include <asm/mach/map.h>
#include <asm/arch/hardware.h>
#include "generic.h"
static struct map_desc at91rm9200_io_desc[] __initdata = {
{
......@@ -94,6 +95,11 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
.pfn = __phys_to_pfn(AT91_BASE_TCB0),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
.virtual = AT91_SRAM_VIRT_BASE,
.pfn = __phys_to_pfn(AT91_SRAM_BASE),
.length = AT91_SRAM_SIZE,
.type = MT_DEVICE,
},
};
......
......@@ -50,9 +50,12 @@
#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
/* Internal SRAM */
#define AT91_BASE_SRAM 0x00200000 /* Internal SRAM base address */
#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */
#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
/* Internal SRAM is mapped below the IO devices */
#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
/* Serial ports */
#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
......
......@@ -21,6 +21,6 @@
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H
#define VMALLOC_END (AT91_IO_VIRT_BASE & PGDIR_MASK)
#define VMALLOC_END (AT91_SRAM_VIRT_BASE & PGDIR_MASK)
#endif
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