提交 0f5e49a2 编写于 作者: M Manuel Lauss 提交者: Ralf Baechle

[MIPS] Alchemy: Fix Au1x SD controller IRQ

With the introduction of MIPS_CPU_IRQ_BASE, the hardcoded IRQ number of
the au1100/au1200 SD controller(s) is no longer valid.
Signed-off-by: NManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 6d2d419f
...@@ -41,8 +41,11 @@ ...@@ -41,8 +41,11 @@
#define NUM_AU1100_MMC_CONTROLLERS 2 #define NUM_AU1100_MMC_CONTROLLERS 2
#if defined(CONFIG_SOC_AU1100)
#define AU1100_SD_IRQ 2 #define AU1100_SD_IRQ AU1100_SD_INT
#elif defined(CONFIG_SOC_AU1200)
#define AU1100_SD_IRQ AU1200_SD_INT
#endif
#define SD0_BASE 0xB0600000 #define SD0_BASE 0xB0600000
......
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