Skip to content

R
raspberrypi-kernel

openeuler / raspberrypi-kernel

通知 13
Star 1
Fork 0
R
raspberrypi-kernel
提交 0dba4dc4 编写于 作者: J Jongpill Lee 提交者： Kukjin Kim
浏览文件
操作

ARM: EXYNOS4: Modify PMU register setting function 

This patch modifies PMU register setting function
to support the other EXYNOS4 SoCs.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
上级 05132182
隐藏空白更改
内联 并排
Showing with 96 addition and 151 deletion
arch/arm/mach-exynos4/include/mach/pmu.h
浏览文件 @ 0dba4dc4
...@@ -13,6 +13,8 @@ ...@@ -13,6 +13,8 @@
#ifndef __ASM_ARCH_PMU_H #ifndef __ASM_ARCH_PMU_H
#define __ASM_ARCH_PMU_H __FILE__ #define __ASM_ARCH_PMU_H __FILE__
#define PMU_TABLE_END NULL
enum sys_powerdown { enum sys_powerdown {
SYS_AFTR, SYS_AFTR,
SYS_LPA, SYS_LPA,
...@@ -20,6 +22,11 @@ enum sys_powerdown { ...@@ -20,6 +22,11 @@ enum sys_powerdown {
NUM_SYS_POWERDOWN, NUM_SYS_POWERDOWN,
}; };
struct exynos4_pmu_conf {
void __iomem *reg;
unsigned int val[NUM_SYS_POWERDOWN];
};
extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode); extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode);
#endif /* __ASM_ARCH_PMU_H */ #endif /* __ASM_ARCH_PMU_H */
arch/arm/mach-exynos4/include/mach/regs-pmu.h
浏览文件 @ 0dba4dc4
...@@ -27,7 +27,6 @@ ...@@ -27,7 +27,6 @@
#define S5P_USE_STANDBY_WFI1 (1 << 17) #define S5P_USE_STANDBY_WFI1 (1 << 17)
#define S5P_USE_STANDBY_WFE0 (1 << 24) #define S5P_USE_STANDBY_WFE0 (1 << 24)
#define S5P_USE_STANDBY_WFE1 (1 << 25) #define S5P_USE_STANDBY_WFE1 (1 << 25)
#define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24))
#define S5P_SWRESET S5P_PMUREG(0x0400) #define S5P_SWRESET S5P_PMUREG(0x0400)
......
arch/arm/mach-exynos4/pmu.c
浏览文件 @ 0dba4dc4
...@@ -16,160 +16,99 @@ ...@@ -16,160 +16,99 @@
#include <mach/regs-clock.h> #include <mach/regs-clock.h>
#include <mach/pmu.h> #include <mach/pmu.h>
static void __iomem *sys_powerdown_reg[] = { static struct exynos4_pmu_conf *exynos4_pmu_config;
S5P_ARM_CORE0_LOWPWR,
S5P_DIS_IRQ_CORE0,
S5P_DIS_IRQ_CENTRAL0,
S5P_ARM_CORE1_LOWPWR,
S5P_DIS_IRQ_CORE1,
S5P_DIS_IRQ_CENTRAL1,
S5P_ARM_COMMON_LOWPWR,
S5P_L2_0_LOWPWR,
S5P_L2_1_LOWPWR,
S5P_CMU_ACLKSTOP_LOWPWR,
S5P_CMU_SCLKSTOP_LOWPWR,
S5P_CMU_RESET_LOWPWR,
S5P_APLL_SYSCLK_LOWPWR,
S5P_MPLL_SYSCLK_LOWPWR,
S5P_VPLL_SYSCLK_LOWPWR,
S5P_EPLL_SYSCLK_LOWPWR,
S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR,
S5P_CMU_RESET_GPSALIVE_LOWPWR,
S5P_CMU_CLKSTOP_CAM_LOWPWR,
S5P_CMU_CLKSTOP_TV_LOWPWR,
S5P_CMU_CLKSTOP_MFC_LOWPWR,
S5P_CMU_CLKSTOP_G3D_LOWPWR,
S5P_CMU_CLKSTOP_LCD0_LOWPWR,
S5P_CMU_CLKSTOP_LCD1_LOWPWR,
S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,
S5P_CMU_CLKSTOP_GPS_LOWPWR,
S5P_CMU_RESET_CAM_LOWPWR,
S5P_CMU_RESET_TV_LOWPWR,
S5P_CMU_RESET_MFC_LOWPWR,
S5P_CMU_RESET_G3D_LOWPWR,
S5P_CMU_RESET_LCD0_LOWPWR,
S5P_CMU_RESET_LCD1_LOWPWR,
S5P_CMU_RESET_MAUDIO_LOWPWR,
S5P_CMU_RESET_GPS_LOWPWR,
S5P_TOP_BUS_LOWPWR,
S5P_TOP_RETENTION_LOWPWR,
S5P_TOP_PWR_LOWPWR,
S5P_LOGIC_RESET_LOWPWR,
S5P_ONENAND_MEM_LOWPWR,
S5P_MODIMIF_MEM_LOWPWR,
S5P_G2D_ACP_MEM_LOWPWR,
S5P_USBOTG_MEM_LOWPWR,
S5P_HSMMC_MEM_LOWPWR,
S5P_CSSYS_MEM_LOWPWR,
S5P_SECSS_MEM_LOWPWR,
S5P_PCIE_MEM_LOWPWR,
S5P_SATA_MEM_LOWPWR,
S5P_PAD_RETENTION_DRAM_LOWPWR,
S5P_PAD_RETENTION_MAUDIO_LOWPWR,
S5P_PAD_RETENTION_GPIO_LOWPWR,
S5P_PAD_RETENTION_UART_LOWPWR,
S5P_PAD_RETENTION_MMCA_LOWPWR,
S5P_PAD_RETENTION_MMCB_LOWPWR,
S5P_PAD_RETENTION_EBIA_LOWPWR,
S5P_PAD_RETENTION_EBIB_LOWPWR,
S5P_PAD_RETENTION_ISOLATION_LOWPWR,
S5P_PAD_RETENTION_ALV_SEL_LOWPWR,
S5P_XUSBXTI_LOWPWR,
S5P_XXTI_LOWPWR,
S5P_EXT_REGULATOR_LOWPWR,
S5P_GPIO_MODE_LOWPWR,
S5P_GPIO_MODE_MAUDIO_LOWPWR,
S5P_CAM_LOWPWR,
S5P_TV_LOWPWR,
S5P_MFC_LOWPWR,
S5P_G3D_LOWPWR,
S5P_LCD0_LOWPWR,
S5P_LCD1_LOWPWR,
S5P_MAUDIO_LOWPWR,
S5P_GPS_LOWPWR,
S5P_GPS_ALIVE_LOWPWR,
};
static const unsigned int sys_powerdown_val[][NUM_SYS_POWERDOWN] = { static struct exynos4_pmu_conf exynos4210_pmu_config[] = {
/* { AFTR, LPA, SLEEP }*/ /* { .reg = address, .val = { AFTR, LPA, SLEEP } */
{ 0, 0, 2 }, /* ARM_CORE0 */ { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
{ 0, 0, 0 }, /* ARM_DIS_IRQ_CORE0 */ { S5P_DIS_IRQ_CORE0, { 0x0, 0x0, 0x0 } },
{ 0, 0, 0 }, /* ARM_DIS_IRQ_CENTRAL0 */ { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
{ 0, 0, 2 }, /* ARM_CORE1 */ { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } },
{ 0, 0, 0 }, /* ARM_DIS_IRQ_CORE1 */ { S5P_DIS_IRQ_CORE1, { 0x0, 0x0, 0x0 } },
{ 0, 0, 0 }, /* ARM_DIS_IRQ_CENTRAL1 */ { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } },
{ 0, 0, 2 }, /* ARM_COMMON */ { S5P_ARM_COMMON_LOWPWR, { 0x0, 0x0, 0x2 } },
{ 2, 2, 3 }, /* ARM_CPU_L2_0 */ { S5P_L2_0_LOWPWR, { 0x2, 0x2, 0x3 } },
{ 2, 2, 3 }, /* ARM_CPU_L2_1 */ { S5P_L2_1_LOWPWR, { 0x2, 0x2, 0x3 } },
{ 1, 0, 0 }, /* CMU_ACLKSTOP */ { S5P_CMU_ACLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* CMU_SCLKSTOP */ { S5P_CMU_SCLKSTOP_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET */ { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 0, 0 }, /* APLL_SYSCLK */ { S5P_APLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* MPLL_SYSCLK */ { S5P_MPLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* VPLL_SYSCLK */ { S5P_VPLL_SYSCLK_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 1, 0 }, /* EPLL_SYSCLK */ { S5P_EPLL_SYSCLK_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_GPS_ALIVE */ { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_GPS_ALIVE */ { S5P_CMU_RESET_GPSALIVE_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_CAM */ { S5P_CMU_CLKSTOP_CAM_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_TV */ { S5P_CMU_CLKSTOP_TV_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_MFC */ { S5P_CMU_CLKSTOP_MFC_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_G3D */ { S5P_CMU_CLKSTOP_G3D_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_LCD0 */ { S5P_CMU_CLKSTOP_LCD0_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_LCD1 */ { S5P_CMU_CLKSTOP_LCD1_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_MAUDIO */ { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_CLKSTOP_GPS */ { S5P_CMU_CLKSTOP_GPS_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_CAM */ { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_TV */ { S5P_CMU_RESET_TV_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_MFC */ { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_G3D */ { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_LCD0 */ { S5P_CMU_RESET_LCD0_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_LCD1 */ { S5P_CMU_RESET_LCD1_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_MAUDIO */ { S5P_CMU_RESET_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* CMU_RESET_GPS */ { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 3, 0, 0 }, /* TOP_BUS */ { S5P_TOP_BUS_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 1, 0, 1 }, /* TOP_RETENTION */ { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } },
{ 3, 0, 3 }, /* TOP_PWR */ { S5P_TOP_PWR_LOWPWR, { 0x3, 0x0, 0x3 } },
{ 1, 1, 0 }, /* LOGIC_RESET */ { S5P_LOGIC_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 3, 0, 0 }, /* ONENAND_MEM */ { S5P_ONENAND_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* MODIMIF_MEM */ { S5P_MODIMIF_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* G2D_ACP_MEM */ { S5P_G2D_ACP_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* USBOTG_MEM */ { S5P_USBOTG_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* HSMMC_MEM */ { S5P_HSMMC_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* CSSYS_MEM */ { S5P_CSSYS_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* SECSS_MEM */ { S5P_SECSS_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* PCIE_MEM */ { S5P_PCIE_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 3, 0, 0 }, /* SATA_MEM */ { S5P_SATA_MEM_LOWPWR, { 0x3, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_DRAM */ { S5P_PAD_RETENTION_DRAM_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 1, 0 }, /* PAD_RETENTION_MAUDIO */ { S5P_PAD_RETENTION_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_GPIO */ { S5P_PAD_RETENTION_GPIO_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_UART */ { S5P_PAD_RETENTION_UART_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_MMCA */ { S5P_PAD_RETENTION_MMCA_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_MMCB */ { S5P_PAD_RETENTION_MMCB_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_EBIA */ { S5P_PAD_RETENTION_EBIA_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_EBIB */ { S5P_PAD_RETENTION_EBIB_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_ISOLATION */ { S5P_PAD_RETENTION_ISOLATION_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 0, 0 }, /* PAD_RETENTION_ALV_SEL */ { S5P_PAD_RETENTION_ALV_SEL_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 1, 0 }, /* XUSBXTI */ { S5P_XUSBXTI_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* XXTI */ { S5P_XXTI_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 1, 0 }, /* EXT_REGULATOR */ { S5P_EXT_REGULATOR_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 1, 0, 0 }, /* GPIO_MODE */ { S5P_GPIO_MODE_LOWPWR, { 0x1, 0x0, 0x0 } },
{ 1, 1, 0 }, /* GPIO_MODE_MAUDIO */ { S5P_GPIO_MODE_MAUDIO_LOWPWR, { 0x1, 0x1, 0x0 } },
{ 7, 0, 0 }, /* CAM */ { S5P_CAM_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 0, 0 }, /* TV */ { S5P_TV_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 0, 0 }, /* MFC */ { S5P_MFC_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 0, 0 }, /* G3D */ { S5P_G3D_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 0, 0 }, /* LCD0 */ { S5P_LCD0_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 0, 0 }, /* LCD1 */ { S5P_LCD1_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 7, 0 }, /* MAUDIO */ { S5P_MAUDIO_LOWPWR, { 0x7, 0x7, 0x0 } },
{ 7, 0, 0 }, /* GPS */ { S5P_GPS_LOWPWR, { 0x7, 0x0, 0x0 } },
{ 7, 0, 0 }, /* GPS_ALIVE */ { S5P_GPS_ALIVE_LOWPWR, { 0x7, 0x0, 0x0 } },
{ PMU_TABLE_END,},
}; };
void exynos4_sys_powerdown_conf(enum sys_powerdown mode) void exynos4_sys_powerdown_conf(enum sys_powerdown mode)
{ {
unsigned int count = ARRAY_SIZE(sys_powerdown_reg); unsigned int i;
for (i = 0; (exynos4_pmu_config[i].reg != PMU_TABLE_END) ; i++)
__raw_writel(exynos4_pmu_config[i].val[mode],
exynos4_pmu_config[i].reg);
}
static int __init exynos4_pmu_init(void)
{
exynos4_pmu_config = exynos4210_pmu_config;
pr_info("EXYNOS4210 PMU Initialize\n");
for (; count > 0; count--) return 0;
__raw_writel(sys_powerdown_val[count - 1][mode],
sys_powerdown_reg[count - 1]);
} }
arch_initcall(exynos4_pmu_init);
Markdown is supported
0% 或 .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑！
想要评论请 注册 或