提交 0c841212 编写于 作者: P Paulo Zanoni 提交者: Daniel Vetter

drm/i915: only enable HWSTAM interrupts on postinstall on ILK+

We should only enable interrupts at postinstall.

And now on ILK/SNB/IVB/HSW the irq_preinstall and irq_postinstall
functions leave the hardware in the same state.
Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Fix compile fail due to drm_i915_private_t typedef removal.]
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 823f6b38
...@@ -2912,6 +2912,8 @@ static void ironlake_irq_reset(struct drm_device *dev) ...@@ -2912,6 +2912,8 @@ static void ironlake_irq_reset(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
I915_WRITE(HWSTAM, 0xffffffff);
GEN5_IRQ_RESET(DE); GEN5_IRQ_RESET(DE);
if (IS_GEN7(dev)) if (IS_GEN7(dev))
I915_WRITE(GEN7_ERR_INT, 0xffffffff); I915_WRITE(GEN7_ERR_INT, 0xffffffff);
...@@ -2923,10 +2925,6 @@ static void ironlake_irq_reset(struct drm_device *dev) ...@@ -2923,10 +2925,6 @@ static void ironlake_irq_reset(struct drm_device *dev)
static void ironlake_irq_preinstall(struct drm_device *dev) static void ironlake_irq_preinstall(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private;
I915_WRITE(HWSTAM, 0xeffe);
ironlake_irq_reset(dev); ironlake_irq_reset(dev);
} }
...@@ -3099,6 +3097,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev) ...@@ -3099,6 +3097,8 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
dev_priv->irq_mask = ~display_mask; dev_priv->irq_mask = ~display_mask;
I915_WRITE(HWSTAM, 0xeffe);
ibx_irq_pre_postinstall(dev); ibx_irq_pre_postinstall(dev);
GEN5_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask); GEN5_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask);
...@@ -3354,8 +3354,6 @@ static void ironlake_irq_uninstall(struct drm_device *dev) ...@@ -3354,8 +3354,6 @@ static void ironlake_irq_uninstall(struct drm_device *dev)
intel_hpd_irq_uninstall(dev_priv); intel_hpd_irq_uninstall(dev_priv);
I915_WRITE(HWSTAM, 0xffffffff);
ironlake_irq_reset(dev); ironlake_irq_reset(dev);
} }
......
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