davinci: Integrate cp_intc support into low-level irq code

Integrate the Common Platform Interrupt Controller (cp_intc)
support into the low-level irq handling for davinci and similar
platforms.  Do it such that support for cp_intc and the original
aintc can coexist in the same kernel binary.
Signed-off-by: NMark A. Greer <mgreer@mvista.com>
Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>

arch/arm/mach-davinci/Kconfig

 if ARCH_DAVINCI
 
+config AINTC
+	bool
+
 config CP_INTC
 	bool
 
@@ -9,12 +12,15 @@ comment "DaVinci Core Type"
 
 config ARCH_DAVINCI_DM644x
 	bool "DaVinci 644x based system"
+	select AINTC
 
 config ARCH_DAVINCI_DM355
         bool "DaVinci 355 based system"
+	select AINTC
 
 config ARCH_DAVINCI_DM646x
         bool "DaVinci 646x based system"
+	select AINTC
 
 comment "DaVinci Board Type"
 

arch/arm/mach-davinci/Makefile

@@ -4,17 +4,19 @@
 #
 
 # Common objects
-obj-y 			:= time.o irq.o clock.o serial.o io.o psc.o \
+obj-y 			:= time.o clock.o serial.o io.o psc.o \
 			   gpio.o devices.o dma.o usb.o common.o
 
 obj-$(CONFIG_DAVINCI_MUX)		+= mux.o
-obj-$(CONFIG_CP_INTC)			+= cp_intc.o
 
 # Chip specific
 obj-$(CONFIG_ARCH_DAVINCI_DM644x)       += dm644x.o
 obj-$(CONFIG_ARCH_DAVINCI_DM355)        += dm355.o
 obj-$(CONFIG_ARCH_DAVINCI_DM646x)       += dm646x.o
 
+obj-$(CONFIG_AINTC)			+= irq.o
+obj-$(CONFIG_CP_INTC)			+= cp_intc.o
+
 # Board specific
 obj-$(CONFIG_MACH_DAVINCI_EVM)  	+= board-dm644x-evm.o
 obj-$(CONFIG_MACH_SFFSDR)		+= board-sffsdr.o

arch/arm/mach-davinci/common.c

@@ -25,6 +25,7 @@ struct davinci_soc_info davinci_soc_info;
 EXPORT_SYMBOL(davinci_soc_info);
 
 void __iomem *davinci_intc_base;
+int davinci_intc_type;
 
 void davinci_get_mac_addr(struct memory_accessor *mem_acc, void *context)
 {
@@ -99,6 +100,7 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
 	}
 
 	davinci_intc_base = davinci_soc_info.intc_base;
+	davinci_intc_type = davinci_soc_info.intc_type;
 	return;
 
 err:

arch/arm/mach-davinci/include/mach/common.h

@@ -18,6 +18,7 @@ extern struct sys_timer davinci_timer;
 
 extern void davinci_irq_init(void);
 extern void __iomem *davinci_intc_base;
+extern int davinci_intc_type;
 
 /* parameters describe VBUS sourcing for host mode */
 extern void setup_usb(unsigned mA, unsigned potpgt_msec);

arch/arm/mach-davinci/include/mach/entry-macro.S

@@ -23,9 +23,28 @@
 		.endm
 
 		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
+#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
+		ldr \tmp, =davinci_intc_type
+		ldr \tmp, [\tmp]
+		cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
+		beq 1001f
+#endif
+#if defined(CONFIG_AINTC)
 		ldr \tmp, [\base, #0x14]
 		movs \tmp, \tmp, lsr #2
 		sub \irqnr, \tmp, #1
+		b 1002f
+#endif
+#if defined(CONFIG_CP_INTC)
+1001:		ldr \irqnr, [\base, #0x80] /* get irq number */
+		and \irqnr, \irqnr, #0xff  /* irq is in bits 0-9 */
+		mov \tmp, \irqnr, lsr #3
+		and \tmp, \tmp, #0xfc
+		add \tmp, \tmp, #0x280 /* get the register offset */
+		ldr \irqstat, [\base, \tmp] /* get the intc status */
+		cmp \irqstat, #0x0
+#endif
+1002:
 		.endm
 
 		.macro	irq_prio_table