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由 Scott Jiang 提交于
New spi controller(version 3) is integrated into Blackfin 60x processor. Comparing to bf5xx spi controller, we support 32 bits word size and independent receive and transmit DMA channels now. Also mode 0 and 2 (CPHA = 0) can get fully supported becasue cs line may be controlled by the software. Signed-off-by: NScott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: NMark Brown <broonie@linaro.org>
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