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由 Liu Dave-r63238 提交于
MPC8323EMDS board ethernet interface with RMII uses the CLK16 divisor for the rx and tx clock, but the ucc_set_qe_mux_rxtx() function doesn't handle the CLK16 setting of the CMXUCR3 and CMXUCR4 registers. This fixes it. Signed-off-by: NDave Liu <daveliu@freescale.com> Signed-off-by: NPaul Mackerras <paulus@samba.org>
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