• B
    drm/i915: Clean up the ring scaling calculations · f6aca45c
    Ben Widawsky 提交于
    This patch attempts to clean up the ring/IA scaling programming in the
    following ways.
    1. Fix the comment about the DDR frequency. The math is 266MHz, not
    133MHz. Formula was right, docs are wrong.
    
    2. Mask the DCLK register since I don't know how it is defined on future
    platforms.
    
    3. use mult_frac instead of magic math.
    
    This helps for future platform enabling.
    
    v2: Actually use the right patch. The v1 was a mix of things, none of
    which was right. Note that due to rounding, we actually get different
    values (slightly higher) for the effective ring frequency.
    
    v3: Use 1.25 instead of 1.33 as the original code did. (Jesse)
    
    CC: Jesse Barnes <jbarnes@virtuousgeek.org>
    CC: Chris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: NBen Widawsky <ben@bwidawsk.net>
    Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    f6aca45c
intel_pm.c 160.6 KB