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由 Masahiro Yamada 提交于
Adjust the PHY parameters for more stable access to the eMMC device. Set the SDCLK output delay value to 21 (including HS200/400 modes). Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
e345eded
Adjust the PHY parameters for more stable access to the eMMC device.
Set the SDCLK output delay value to 21 (including HS200/400 modes).
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>