• B
    drm/i915: Enable PPGTT command parser checks · d4d48035
    Brad Volkin 提交于
    Various commands that access memory have a bit to determine whether
    the graphics address specified in the command should use the GGTT or
    PPGTT for translation. These checks ensure that the bit indicates
    PPGTT translation.
    
    Most of these checks use the existing bit-checking infrastructure.
    The PIPE_CONTROL and MI_FLUSH_DW commands, however, are multi-function
    commands. The GGTT/PPGTT bit is only relevant for certain uses of the
    command. As such, this change also extends the bit-checking code to
    include a "condition" mask and offset. If the condition mask is non-zero
    then the parser only performs the bit check when the bits specified by
    the condition mask/offset are also non-zero.
    
    NOTE: At this point in the series PPGTT must be enabled for the parser
    to work correctly. If it's not enabled, userspace will not be setting
    the PPGTT bits the way the parser requires. VLV is the only platform
    where this is a problem, so at this point, we disable parsing for VLV.
    
    v2: whitespace and trailing commas fixes, rebased
    
    OTC-Tracker: AXIA-4631
    Change-Id: I3f4c76b6734f1956ec47e698230f97d0998ff92b
    Signed-off-by: NBrad Volkin <bradley.d.volkin@intel.com>
    Reviewed-by: NJani Nikula <jani.nikula@intel.com>
    [danvet: Drop the unecessary cast Jani spotted.]
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    d4d48035
i915_drv.h 80.4 KB