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    drm/i915: disable flushing_list/gpu_write_list · cc889e0f
    Daniel Vetter 提交于
    This is just the minimal patch to disable all this code so that we can
    do decent amounts of QA before we rip it all out.
    
    The complicating thing is that we need to flush the gpu caches after
    the batchbuffer is emitted. Which is past the point of no return where
    execbuffer can't fail any more (otherwise we risk submitting the same
    batch multiple times).
    
    Hence we need to add a flag to track whether any caches associated
    with that ring are dirty. And emit the flush in add_request if that's
    the case.
    
    Note that this has a quite a few behaviour changes:
    - Caches get flushed/invalidated unconditionally.
    - Invalidation now happens after potential inter-ring sync.
    
    I've bantered around a bit with Chris on irc whether this fixes
    anything, and it might or might not. The only thing clear is that with
    these changes it's much easier to reason about correctness.
    
    Also rip out a lone get_next_request_seqno in the execbuffer
    retire_commands function. I've dug around and I couldn't figure out
    why that is still there, with the outstanding lazy request stuff it
    shouldn't be necessary.
    
    v2: Chris Wilson complained that I also invalidate the read caches
    when flushing after a batchbuffer. Now optimized.
    
    v3: Added some comments to explain the new flushing behaviour.
    
    Cc: Eric Anholt <eric@anholt.net>
    Cc: Chris Wilson <chris@chris-wilson.co.uk>
    Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
    Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    cc889e0f
i915_gem.c 104.8 KB