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由 Jeeja KP 提交于
Broxton DSP is mostly similar to Skylake one but with subtle differences like no Code Load DMA and uses HDA DMA for code loading, DSP D0 and D3 sequences are different. These changes are comprehended by adding different DSP power up and down handlers, and new loader ops and also adding prepare and trigger which HDA DSP DMA requires Signed-off-by: NJeeja KP <jeeja.kp@intel.com> Signed-off-by: NJayachandran B <jayachandran.b@intel.com> Signed-off-by: NGuruprasadX Pawse <guruprasadx.pawse@intel.com> Signed-off-by: NKranthi G <gudishax.kranthikumar@intel.com> Signed-off-by: NDharageswari R <dharageswari.r@intel.com> Signed-off-by: NRamesh Babu <ramesh.babu@intel.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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