In order to reduce the impact of ramp times rather than enabling the
regulators for a device in series use async tasks to run the actual
enables. This means that the delays which the enables implement can all
run in parallel, though it does mean that the order in which the
supplies come on may be unstable.

For super bonus fun points if any of the regulators are shared between
multiple supplies on the same device (as is rather likely) then this
will test our locking.  Note that in this case we only delay once for
each physical regulator so the threads shouldn't block each other while
delaying.

It'd be even nicer if we could coalesce writes to a shared enable registers
in PMICs but that's definitely future work, and it may also be useful
and is certainly more achievable to optimise out the parallelism if none
of the regulators implement ramp delays.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>