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由 Peter De Schrijver 提交于
Tegra124 has a clock which consists of a mux and a fractional divider. Add support for this. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>
b29f9e92
Tegra124 has a clock which consists of a mux and a fractional divider. Add support for this. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com>