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    drm/i915: Store max dotclock · adafdc6f
    Mika Kahola 提交于
    Store max dotclock into dev_priv structure so we are able
    to filter out the modes that are not supported by our
    platforms.
    
    V2:
    - limit the max dot clock frequency to max CD clock frequency
      for the gen9 and above
    - limit the max dot clock frequency to 90% of the max CD clock
      frequency for the older gens
    - for Cherryview the max dot clock frequency is limited to 95%
      of the max CD clock frequency
    - for gen2 and gen3 the max dot clock limit is set to 90% of the
      2X max CD clock frequency
    
    V3:
    - max_dotclk variable renamed as max_dotclk_freq in i915_drv.h
    - in intel_compute_max_dotclk() the rounding method changed from
      round up to round down when computing max dotclock
    
    V4:
    - Haswell and Broadwell supports now dot clocks up to max CD clock
      frequency
    Signed-off-by: NMika Kahola <mika.kahola@intel.com>
    Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    adafdc6f
i915_drv.h 104.8 KB