the ff1 and bitrev opcode appears in ISA C and ISA A+ what isn't
supported by all plattforms. The assembly optimization is automaticly
enabled if the compiler understand the required cpu keyword.
My m5235 seems to boot and run fine so far.
Signed-off-by: NSebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>