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    drm/i915/bdw: Check for slice, subslice and EU count for BDW · 91bedd34
    Łukasz Daniluk 提交于
    Added checks for available slices, subslices and EUs for Broadwell. This
    information is filled in intel_device_info and is available to user with
    GET_PARAM.
    Added checks for enabled slices, subslices and EU for Broadwell. This
    information is based on available counts but takes power gated slices
    into account. It can be read in debugfs.
    Introduce new register defines that contain information on slices on
    Broadwell.
    
    v2:
    - Introduce GT_SLICE_INFO register
    - Change Broadwell sseu_device_status function to use GT_SLICE_INFO
      register instead of RPCS register
    - Undo removal of dev_priv variables in Cherryview and Gen9
      sseu_device_satus functions
    
    v3:
    - Fix style issues
    
    v4:
    - Corrected comment
    - Reverted reordering of defines
    
    Cc: Jeff Mcgee <jeff.mcgee@intel.com>
    Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
    Signed-off-by: NŁukasz Daniluk <lukasz.daniluk@intel.com>
    Reviewed-by: NJeff McGee <jeff.mcgee@intel.com>
    Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
    91bedd34
i915_reg.h 304.0 KB