the marco and coming new CSR multiple SoCs have SET/CLR pair for
INTEN registers to avoid some read-modify-write.

this patch adds support for this and make the driver support current
up and coming mp SoCs.
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>