Watchdog configuration register and timer count register were interchanged,
causing wrong values to be written into both registers.
This caused watchdog triggered resets even if the watchdog was reset in time.
Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>