Correct the alignment of the internal buffer used by the QUICC Engine
SDMA controller to 4Kbytes.  Correct the shift direction in the logic
that sets up the SDMR register for the QUICC Engine SDMA controller.
Signed-off-by: NChuck Meade <chuckmeade@mindspring.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>