For eSDHC(version < 2.3), the pre divider only could divide base clock
by 2 at least. Add workaround for this to avoid unexpected issue.
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Acked-by: NJoakim Tjernlund <Joakim.Tjernlund@transmode.se>
Fixes: bd455029 ("mmc: sdhci-of-esdhc: Pre divider starts at 1")
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>