This patch adds the SMP/nAMP mode setting to __v7_setup and also sets
TTBR to shared page table walks if SMP is enabled. The PTWs are also
marked inner cacheable for both SMP and UP modes (setting this is fine
even if the CPU doesn't support the feature).
Signed-off-by: NJon Callan <Jon.Callan@arm.com>
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>