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由 Steve Wise 提交于
The HW design requires zeroing any pad in SGLs. Signed-off-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>
13fecb83
The HW design requires zeroing any pad in SGLs. Signed-off-by: NSteve Wise <swise@opengridcomputing.com> Signed-off-by: NRoland Dreier <rolandd@cisco.com>