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由 Zhi Mao 提交于
Make sure to disable the PWM clock if the PWM cannot be configured due to the clock divider exceeding the maximum value. While at it, replace the hardcoded maximum clock divider with a defined constant to improve code readability. Signed-off-by: NZhi Mao <zhi.mao@mediatek.com> Acked-by: NJohn Crispin <john@phrozen.org> Signed-off-by: NThierry Reding <thierry.reding@gmail.com>
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