According to the i.MX25 reference manual, this SoC does not have support
for the receive accelerator (RACC) register at offset 0x1C4.

http://www.nxp.com/files/dsp/doc/ref_manual/IMX25RM.pdfSigned-off-by: NEric Nelson <eric@nelint.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>