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由 Carlo Caione 提交于
This patchset adds the infrastructure for registering and managing the core clocks found on Amlogic MesonX SoCs. In particular: - PLLs - CPU clock - Fixed rate clocks, fixed factor clocks, ... Signed-off-by: NCarlo Caione <carlo@endlessm.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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