When switching SD and SDIO cards from 3.3V to 1.8V signal levels, the
clock should be gated for 5 ms during the step. After enabling the
clock, the host should wait for at least 1 ms before checking for
failure. Failure by the card to switch is indicated by dat[0:3] being
pulled low. The host should check for this condition and power-cycle
the card if failure is indicated.

Add a retry mechanism for the SDIO case.

If the voltage switch fails repeatedly, give up and continue the
initialization using the original voltage.

This patch places a couple of requirements on the host driver:

 1) mmc_set_ios with ios.clock = 0 must gate the clock
 2) mmc_power_off must actually cut the power to the card
 3) The card_busy host_ops member must be implemented

if these requirements are not fulfilled, the 1.8V signal voltage switch
will still be attempted but may not be successful.
Signed-off-by: NJohan Rudholm <johan.rudholm@stericsson.com>
Signed-off-by: NKevin Liu <kliu5@marvell.com>
Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
Tested-by: NWei WANG <wei_wang@realsil.com.cn>
Signed-off-by: NChris Ball <cjb@laptop.org>