• R
    perf/x86: Implement IBS event configuration · 51041943
    Robert Richter 提交于
    This patch implements perf configuration for AMD IBS. The IBS
    pmu is selected using the type attribute in sysfs. There are two
    types of ibs pmus, for instruction fetch (IBS_FETCH) and for
    instruction execution (IBS_OP):
    
     /sys/bus/event_source/devices/ibs_fetch/type
     /sys/bus/event_source/devices/ibs_op/type
    
    Except for the sample period IBS can only be set up with raw
    config values and raw data samples. The event attributes for the
    syscall should be programmed like this (IBS_FETCH):
    
            type = get_pmu_type("/sys/bus/event_source/devices/ibs_fetch/type");
    
            memset(&attr, 0, sizeof(attr));
            attr.type        = type;
            attr.sample_type = PERF_SAMPLE_CPU | PERF_SAMPLE_RAW;
            attr.config      = IBS_FETCH_CONFIG_DEFAULT;
    
    This implementation does not yet support 64 bit counters. It is
    limited to the hardware counter bit width which is 20 bits. 64
    bit support can be added later.
    Signed-off-by: NRobert Richter <robert.richter@amd.com>
    Acked-by: NPeter Zijlstra <peterz@infradead.org>
    Cc: Stephane Eranian <eranian@google.com>
    Link: http://lkml.kernel.org/r/1323968199-9326-2-git-send-email-robert.richter@amd.comSigned-off-by: NIngo Molnar <mingo@elte.hu>
    51041943
perf_event_amd_ibs.c 7.8 KB