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由 Matthew Fleming 提交于
The MMC spec states that the timeout for accessing the CSD and CID registers is 64 clock cycles. Signed-off-by: NMatthew Fleming <matthew.fleming@imgtec.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
0d3e0460
The MMC spec states that the timeout for accessing the CSD and CID registers is 64 clock cycles. Signed-off-by: NMatthew Fleming <matthew.fleming@imgtec.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>