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    MIPS: Partially disable RIXI support. · 55fdcb2d
    Ralf Baechle 提交于
    Execution of break instruction, trap instructions, emulation of unaligned
    loads or floating point instructions - anything that tries to read the
    instruction's opcode from userspace - needs read access to a page.
    
    RIXI (Read Inhibit / Execute Inhibit) support however allows the creation of
    pags that are executable but not readable.  On such a mapping the attempted
    load of the opcode by the kernel is going to cause an endless loop of
    page faults.
    
    The quick workaround for this is to disable the combinations that the kernel
    currently isn't able to handle which are executable mappings.
    Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
    55fdcb2d
cache.c 7.0 KB