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由 Antonino A. Daplas 提交于
The EDID block should specify the display's operating limits (vertical and horizontal sync ranges, and maximum dot clock). If not given by the EDID block, the ranges are extrapolated from the modelist. However, the computation used is only a rough approximation, and the resulting values may not reflect the actual capability of the display. This problem is frequently encountered when the EDID block has a single entry, the single mode entry will fail validation. To prevent this, calculate the values based on the same method used in fb_validate_mode(). Signed-off-by: NAntonino Daplas <adaplas@pol.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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