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由 Linus Walleij 提交于
The DB8500v2 and DB5500 has a fifth version of the "PL023" and PL180 blocks. However the ASIC engineers have forgot to bump the revision in the PrimeCell peripheral ID registers. Since the platform is aware of the actual silicon revision we need to hard-code the periphid from the platform, bumping the subrevision field to 1. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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