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    perf_counter, x86: Extend perf_counter Pentium M support · f1c6a581
    Daniel Qarras 提交于
    I've attached a patch to remove the Pentium M special casing of
    EMON and as noticed at least with my Pentium M the hardware PMU
    now works:
    
     Performance counter stats for '/bin/ls /var/tmp':
    
           1.809988  task-clock-msecs         #      0.125 CPUs
                  1  context-switches         #      0.001 M/sec
                  0  CPU-migrations           #	 0.000 M/sec
                224  page-faults              #	 0.124 M/sec
            1425648  cycles                   #    787.656 M/sec
             912755  instructions             #	 0.640 IPC
    
    Vince suggested that this code was trying to address erratum
    Y17 in Pentium-M's:
    
      http://download.intel.com/support/processors/mobile/pm/sb/25266532.pdf
    
    But that erratum (related to IA32_MISC_ENABLES.7) does not
    affect perfcounters as we dont use this toggle to disable RDPMC
    and WRMSR/RDMSR access to performance counters. We keep cr4's
    bit 8 (X86_CR4_PCE) clear so unprivileged RDPMC access is not
    allowed anyway.
    
    Cc: Vince Weaver <vince@deater.net>
    Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
    Cc: Stephane Eranian <eranian@googlemail.com>
    LKML-Reference: <new-submission>
    Signed-off-by: NIngo Molnar <mingo@elte.hu>
    f1c6a581
perf_counter.c 45.1 KB