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    IRQCHIP: mips-gic: Avoid rerouting timer IRQs for smp-cmp · 1b6af71a
    James Hogan 提交于
    Commit e9de688d ("irqchip: mips-gic: Support local interrupts")
    changed the GIC irqchip driver so that all local interrupts were routed
    to the same CPU pin used for external interrupts. Unfortunately this
    causes a regression when smp-cmp is used. The CPUs are started by the
    bootloader and put in a timer based waiting poll loop, but when their
    timer interrupts are rerouted to a different IRQ pin which is not
    unmasked they never wake up.
    
    Since smp-cmp support is deprecated and everybody who was using it
    should be switching to smp-cps which brings up the secondary CPUs
    without bootloader assistance, I've gone for the simple fix which can be
    easily removed once smp-cmp is removed, rather than a fully generic fix.
    
    In __gic_init() the local GIC_VPE_TIMER_MAP register is read to find the
    boot-time routing of the local timer interrupt, and a chained handler is
    added to that CPU pin as well as the normal one.
    Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
    Fixes: e9de688d ("irqchip: mips-gic: Support local interrupts")
    Cc: Andrew Bresticker <abrestic@chromium.org>
    Cc: Qais Yousef <qais.yousef@imgtec.com>
    Cc: Paul Burton <paul.burton@imgtec.com>
    Cc: Jason Cooper <jason@lakedaemon.net>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: linux-mips@linux-mips.org
    Reviewed-by: NAndrew Bresticker <abrestic@chromium.org>
    Patchwork: https://patchwork.linux-mips.org/patch/9081/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
    1b6af71a
irq-mips-gic.c 20.2 KB