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由 Lendacky, Thomas 提交于
Currently, the logic will loop endlessly waiting for a rate change to complete. Add a counter so that if the rate change signals never indicate complete the loop will eventually exit. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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