This patch is only relevant for RTC with the SQ_ALT feature which
means the clock output frequency divider is stored in the weekday
register.

Current implementation discards the previous dividers value and clear
them as soon as the time is set.
Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>