changes since v1: we now check if the parent configuration bit was
changed since reset and change the parent when needed.

csi_clk parent was defined with ahb_clk. However, according to the
m31 reference manual, it should be serial_pll_clk.

Guennadi always used a 20 MHz clock that was by chance changed to
a 45 MHz that fits in the mt9t031 spec. Now the clocks are computed
and output correctly (measured on oscillo).
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>