There is a hard hang observed during resume from S3 when
the system receives a DP short pulse interrupt. This is
because there are two code paths contending for GPIO
access for AUX channel transactions. One such path is
through amdgpu_dm_display_resume() function which is
invoked from the regular system resume code path. The
other path is through handle_hpd_rx_irq(), which is
invoked in response to system receiving DP short pulse
interrupt. handle_hpd_rx_irq() guards against conflicting
GPIO access using hpd_lock, but the GPIO access from
amdgpu_dm_display_resume() remains unguarded.

This patch makes sure we use hpd_lock inside
amdgpu_dm_display_resume() to avoid race conditions
for GPIO access.
Signed-off-by: NArindam Nath <arindam.nath@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>