mmu.c 36.1 KB
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/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * This module enables machines with Intel VT-x extensions to run virtual
 * machines without emulation or binary translation.
 *
 * MMU support
 *
 * Copyright (C) 2006 Qumranet, Inc.
 *
 * Authors:
 *   Yaniv Kamay  <yaniv@qumranet.com>
 *   Avi Kivity   <avi@qumranet.com>
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */
#include <linux/types.h>
#include <linux/string.h>
#include <asm/page.h>
#include <linux/mm.h>
#include <linux/highmem.h>
#include <linux/module.h>
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#include <asm/cmpxchg.h>
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#include "vmx.h"
#include "kvm.h"

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#undef MMU_DEBUG

#undef AUDIT

#ifdef AUDIT
static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
#else
static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
#endif

#ifdef MMU_DEBUG

#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)

#else

#define pgprintk(x...) do { } while (0)
#define rmap_printk(x...) do { } while (0)

#endif

#if defined(MMU_DEBUG) || defined(AUDIT)
static int dbg = 1;
#endif
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#ifndef MMU_DEBUG
#define ASSERT(x) do { } while (0)
#else
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#define ASSERT(x)							\
	if (!(x)) {							\
		printk(KERN_WARNING "assertion failed %s:%d: %s\n",	\
		       __FILE__, __LINE__, #x);				\
	}
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#endif
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#define PT64_PT_BITS 9
#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
#define PT32_PT_BITS 10
#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
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#define PT_WRITABLE_SHIFT 1

#define PT_PRESENT_MASK (1ULL << 0)
#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
#define PT_USER_MASK (1ULL << 2)
#define PT_PWT_MASK (1ULL << 3)
#define PT_PCD_MASK (1ULL << 4)
#define PT_ACCESSED_MASK (1ULL << 5)
#define PT_DIRTY_MASK (1ULL << 6)
#define PT_PAGE_SIZE_MASK (1ULL << 7)
#define PT_PAT_MASK (1ULL << 7)
#define PT_GLOBAL_MASK (1ULL << 8)
#define PT64_NX_MASK (1ULL << 63)

#define PT_PAT_SHIFT 7
#define PT_DIR_PAT_SHIFT 12
#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)

#define PT32_DIR_PSE36_SIZE 4
#define PT32_DIR_PSE36_SHIFT 13
#define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)


#define PT_FIRST_AVAIL_BITS_SHIFT 9
#define PT64_SECOND_AVAIL_BITS_SHIFT 52

#define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)

#define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
#define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)

#define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
#define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))

#define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)

#define VALID_PAGE(x) ((x) != INVALID_PAGE)

#define PT64_LEVEL_BITS 9

#define PT64_LEVEL_SHIFT(level) \
		( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )

#define PT64_LEVEL_MASK(level) \
		(((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))

#define PT64_INDEX(address, level)\
	(((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))


#define PT32_LEVEL_BITS 10

#define PT32_LEVEL_SHIFT(level) \
		( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )

#define PT32_LEVEL_MASK(level) \
		(((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))

#define PT32_INDEX(address, level)\
	(((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))


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#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
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#define PT64_DIR_BASE_ADDR_MASK \
	(PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))

#define PT32_BASE_ADDR_MASK PAGE_MASK
#define PT32_DIR_BASE_ADDR_MASK \
	(PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))


#define PFERR_PRESENT_MASK (1U << 0)
#define PFERR_WRITE_MASK (1U << 1)
#define PFERR_USER_MASK (1U << 2)
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#define PFERR_FETCH_MASK (1U << 4)
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#define PT64_ROOT_LEVEL 4
#define PT32_ROOT_LEVEL 2
#define PT32E_ROOT_LEVEL 3

#define PT_DIRECTORY_LEVEL 2
#define PT_PAGE_TABLE_LEVEL 1

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#define RMAP_EXT 4

struct kvm_rmap_desc {
	u64 *shadow_ptes[RMAP_EXT];
	struct kvm_rmap_desc *more;
};

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static struct kmem_cache *pte_chain_cache;
static struct kmem_cache *rmap_desc_cache;
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static struct kmem_cache *mmu_page_cache;
static struct kmem_cache *mmu_page_header_cache;
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static int is_write_protection(struct kvm_vcpu *vcpu)
{
	return vcpu->cr0 & CR0_WP_MASK;
}

static int is_cpuid_PSE36(void)
{
	return 1;
}

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static int is_nx(struct kvm_vcpu *vcpu)
{
	return vcpu->shadow_efer & EFER_NX;
}

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static int is_present_pte(unsigned long pte)
{
	return pte & PT_PRESENT_MASK;
}

static int is_writeble_pte(unsigned long pte)
{
	return pte & PT_WRITABLE_MASK;
}

static int is_io_pte(unsigned long pte)
{
	return pte & PT_SHADOW_IO_MARK;
}

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static int is_rmap_pte(u64 pte)
{
	return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
		== (PT_WRITABLE_MASK | PT_PRESENT_MASK);
}

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static void set_shadow_pte(u64 *sptep, u64 spte)
{
#ifdef CONFIG_X86_64
	set_64bit((unsigned long *)sptep, spte);
#else
	set_64bit((unsigned long long *)sptep, spte);
#endif
}

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static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
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				  struct kmem_cache *base_cache, int min,
				  gfp_t gfp_flags)
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{
	void *obj;

	if (cache->nobjs >= min)
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		return 0;
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	while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
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		obj = kmem_cache_zalloc(base_cache, gfp_flags);
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		if (!obj)
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			return -ENOMEM;
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		cache->objects[cache->nobjs++] = obj;
	}
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	return 0;
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}

static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
{
	while (mc->nobjs)
		kfree(mc->objects[--mc->nobjs]);
}

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static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags)
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{
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	int r;

	r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
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				   pte_chain_cache, 4, gfp_flags);
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	if (r)
		goto out;
	r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
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				   rmap_desc_cache, 1, gfp_flags);
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	if (r)
		goto out;
	r = mmu_topup_memory_cache(&vcpu->mmu_page_cache,
				   mmu_page_cache, 4, gfp_flags);
	if (r)
		goto out;
	r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
				   mmu_page_header_cache, 4, gfp_flags);
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out:
	return r;
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}

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static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
{
	int r;

	r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT);
	if (r < 0) {
		spin_unlock(&vcpu->kvm->lock);
		kvm_arch_ops->vcpu_put(vcpu);
		r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL);
		kvm_arch_ops->vcpu_load(vcpu);
		spin_lock(&vcpu->kvm->lock);
	}
	return r;
}

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static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
{
	mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
	mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
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	mmu_free_memory_cache(&vcpu->mmu_page_cache);
	mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
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}

static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
				    size_t size)
{
	void *p;

	BUG_ON(!mc->nobjs);
	p = mc->objects[--mc->nobjs];
	memset(p, 0, size);
	return p;
}

static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
{
	if (mc->nobjs < KVM_NR_MEM_OBJS)
		mc->objects[mc->nobjs++] = obj;
	else
		kfree(obj);
}

static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
{
	return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
				      sizeof(struct kvm_pte_chain));
}

static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
			       struct kvm_pte_chain *pc)
{
	mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
}

static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
{
	return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
				      sizeof(struct kvm_rmap_desc));
}

static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
			       struct kvm_rmap_desc *rd)
{
	mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
}

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/*
 * Reverse mapping data structures:
 *
 * If page->private bit zero is zero, then page->private points to the
 * shadow page table entry that points to page_address(page).
 *
 * If page->private bit zero is one, (then page->private & ~1) points
 * to a struct kvm_rmap_desc containing more mappings.
 */
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static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
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{
	struct page *page;
	struct kvm_rmap_desc *desc;
	int i;

	if (!is_rmap_pte(*spte))
		return;
	page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
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	if (!page_private(page)) {
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		rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
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		set_page_private(page,(unsigned long)spte);
	} else if (!(page_private(page) & 1)) {
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		rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
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		desc = mmu_alloc_rmap_desc(vcpu);
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		desc->shadow_ptes[0] = (u64 *)page_private(page);
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		desc->shadow_ptes[1] = spte;
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		set_page_private(page,(unsigned long)desc | 1);
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	} else {
		rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
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		desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
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		while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
			desc = desc->more;
		if (desc->shadow_ptes[RMAP_EXT-1]) {
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			desc->more = mmu_alloc_rmap_desc(vcpu);
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			desc = desc->more;
		}
		for (i = 0; desc->shadow_ptes[i]; ++i)
			;
		desc->shadow_ptes[i] = spte;
	}
}

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static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
				   struct page *page,
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				   struct kvm_rmap_desc *desc,
				   int i,
				   struct kvm_rmap_desc *prev_desc)
{
	int j;

	for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
		;
	desc->shadow_ptes[i] = desc->shadow_ptes[j];
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	desc->shadow_ptes[j] = NULL;
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	if (j != 0)
		return;
	if (!prev_desc && !desc->more)
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		set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
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	else
		if (prev_desc)
			prev_desc->more = desc->more;
		else
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			set_page_private(page,(unsigned long)desc->more | 1);
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	mmu_free_rmap_desc(vcpu, desc);
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}

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static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
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{
	struct page *page;
	struct kvm_rmap_desc *desc;
	struct kvm_rmap_desc *prev_desc;
	int i;

	if (!is_rmap_pte(*spte))
		return;
	page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
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	if (!page_private(page)) {
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		printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
		BUG();
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	} else if (!(page_private(page) & 1)) {
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		rmap_printk("rmap_remove:  %p %llx 1->0\n", spte, *spte);
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		if ((u64 *)page_private(page) != spte) {
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			printk(KERN_ERR "rmap_remove:  %p %llx 1->BUG\n",
			       spte, *spte);
			BUG();
		}
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		set_page_private(page,0);
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	} else {
		rmap_printk("rmap_remove:  %p %llx many->many\n", spte, *spte);
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		desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
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		prev_desc = NULL;
		while (desc) {
			for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
				if (desc->shadow_ptes[i] == spte) {
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					rmap_desc_remove_entry(vcpu, page,
							       desc, i,
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							       prev_desc);
					return;
				}
			prev_desc = desc;
			desc = desc->more;
		}
		BUG();
	}
}

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static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
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{
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	struct kvm *kvm = vcpu->kvm;
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	struct page *page;
	struct kvm_rmap_desc *desc;
	u64 *spte;

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	page = gfn_to_page(kvm, gfn);
	BUG_ON(!page);
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	while (page_private(page)) {
		if (!(page_private(page) & 1))
			spte = (u64 *)page_private(page);
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		else {
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			desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
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			spte = desc->shadow_ptes[0];
		}
		BUG_ON(!spte);
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		BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
		       != page_to_pfn(page));
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		BUG_ON(!(*spte & PT_PRESENT_MASK));
		BUG_ON(!(*spte & PT_WRITABLE_MASK));
		rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
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		rmap_remove(vcpu, spte);
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		kvm_arch_ops->tlb_flush(vcpu);
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		set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
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	}
}

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#ifdef MMU_DEBUG
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static int is_empty_shadow_page(u64 *spt)
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{
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	u64 *pos;
	u64 *end;

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	for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
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		if (*pos != 0) {
			printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
			       pos, *pos);
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			return 0;
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		}
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	return 1;
}
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#endif
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static void kvm_mmu_free_page(struct kvm_vcpu *vcpu,
			      struct kvm_mmu_page *page_head)
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{
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	ASSERT(is_empty_shadow_page(page_head->spt));
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	list_del(&page_head->link);
	mmu_memory_cache_free(&vcpu->mmu_page_cache, page_head->spt);
	mmu_memory_cache_free(&vcpu->mmu_page_header_cache, page_head);
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	++vcpu->kvm->n_free_mmu_pages;
}

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static unsigned kvm_page_table_hashfn(gfn_t gfn)
{
	return gfn;
}

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static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
					       u64 *parent_pte)
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{
	struct kvm_mmu_page *page;

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	if (!vcpu->kvm->n_free_mmu_pages)
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		return NULL;
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	page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
				      sizeof *page);
	page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
	set_page_private(virt_to_page(page->spt), (unsigned long)page);
	list_add(&page->link, &vcpu->kvm->active_mmu_pages);
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	ASSERT(is_empty_shadow_page(page->spt));
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	page->slot_bitmap = 0;
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	page->multimapped = 0;
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	page->parent_pte = parent_pte;
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	--vcpu->kvm->n_free_mmu_pages;
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	return page;
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}

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static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
				    struct kvm_mmu_page *page, u64 *parent_pte)
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{
	struct kvm_pte_chain *pte_chain;
	struct hlist_node *node;
	int i;

	if (!parent_pte)
		return;
	if (!page->multimapped) {
		u64 *old = page->parent_pte;

		if (!old) {
			page->parent_pte = parent_pte;
			return;
		}
		page->multimapped = 1;
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		pte_chain = mmu_alloc_pte_chain(vcpu);
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		INIT_HLIST_HEAD(&page->parent_ptes);
		hlist_add_head(&pte_chain->link, &page->parent_ptes);
		pte_chain->parent_ptes[0] = old;
	}
	hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
		if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
			continue;
		for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
			if (!pte_chain->parent_ptes[i]) {
				pte_chain->parent_ptes[i] = parent_pte;
				return;
			}
	}
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	pte_chain = mmu_alloc_pte_chain(vcpu);
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	BUG_ON(!pte_chain);
	hlist_add_head(&pte_chain->link, &page->parent_ptes);
	pte_chain->parent_ptes[0] = parent_pte;
}

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static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
				       struct kvm_mmu_page *page,
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				       u64 *parent_pte)
{
	struct kvm_pte_chain *pte_chain;
	struct hlist_node *node;
	int i;

	if (!page->multimapped) {
		BUG_ON(page->parent_pte != parent_pte);
		page->parent_pte = NULL;
		return;
	}
	hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
		for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
			if (!pte_chain->parent_ptes[i])
				break;
			if (pte_chain->parent_ptes[i] != parent_pte)
				continue;
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			while (i + 1 < NR_PTE_CHAIN_ENTRIES
				&& pte_chain->parent_ptes[i + 1]) {
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				pte_chain->parent_ptes[i]
					= pte_chain->parent_ptes[i + 1];
				++i;
			}
			pte_chain->parent_ptes[i] = NULL;
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			if (i == 0) {
				hlist_del(&pte_chain->link);
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				mmu_free_pte_chain(vcpu, pte_chain);
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				if (hlist_empty(&page->parent_ptes)) {
					page->multimapped = 0;
					page->parent_pte = NULL;
				}
			}
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			return;
		}
	BUG();
}

static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
						gfn_t gfn)
{
	unsigned index;
	struct hlist_head *bucket;
	struct kvm_mmu_page *page;
	struct hlist_node *node;

	pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
	index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
	bucket = &vcpu->kvm->mmu_page_hash[index];
	hlist_for_each_entry(page, node, bucket, hash_link)
		if (page->gfn == gfn && !page->role.metaphysical) {
			pgprintk("%s: found role %x\n",
				 __FUNCTION__, page->role.word);
			return page;
		}
	return NULL;
}

static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
					     gfn_t gfn,
					     gva_t gaddr,
					     unsigned level,
					     int metaphysical,
611
					     unsigned hugepage_access,
612 613 614 615 616 617 618 619 620 621 622 623 624
					     u64 *parent_pte)
{
	union kvm_mmu_page_role role;
	unsigned index;
	unsigned quadrant;
	struct hlist_head *bucket;
	struct kvm_mmu_page *page;
	struct hlist_node *node;

	role.word = 0;
	role.glevels = vcpu->mmu.root_level;
	role.level = level;
	role.metaphysical = metaphysical;
625
	role.hugepage_access = hugepage_access;
626 627 628 629 630 631 632 633 634 635 636
	if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
		quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
		quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
		role.quadrant = quadrant;
	}
	pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
		 gfn, role.word);
	index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
	bucket = &vcpu->kvm->mmu_page_hash[index];
	hlist_for_each_entry(page, node, bucket, hash_link)
		if (page->gfn == gfn && page->role.word == role.word) {
637
			mmu_page_add_parent_pte(vcpu, page, parent_pte);
638 639 640 641 642 643 644 645 646 647
			pgprintk("%s: found\n", __FUNCTION__);
			return page;
		}
	page = kvm_mmu_alloc_page(vcpu, parent_pte);
	if (!page)
		return page;
	pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
	page->gfn = gfn;
	page->role = role;
	hlist_add_head(&page->hash_link, bucket);
648
	if (!metaphysical)
649
		rmap_write_protect(vcpu, gfn);
650 651 652
	return page;
}

653 654 655
static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
					 struct kvm_mmu_page *page)
{
656 657 658 659
	unsigned i;
	u64 *pt;
	u64 ent;

660
	pt = page->spt;
661 662 663 664

	if (page->role.level == PT_PAGE_TABLE_LEVEL) {
		for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
			if (pt[i] & PT_PRESENT_MASK)
665
				rmap_remove(vcpu, &pt[i]);
666 667
			pt[i] = 0;
		}
668
		kvm_arch_ops->tlb_flush(vcpu);
669 670 671 672 673 674 675 676 677 678
		return;
	}

	for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
		ent = pt[i];

		pt[i] = 0;
		if (!(ent & PT_PRESENT_MASK))
			continue;
		ent &= PT64_BASE_ADDR_MASK;
679
		mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
680
	}
681 682
}

683 684 685 686
static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
			     struct kvm_mmu_page *page,
			     u64 *parent_pte)
{
687
	mmu_page_remove_parent_pte(vcpu, page, parent_pte);
688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704
}

static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
			     struct kvm_mmu_page *page)
{
	u64 *parent_pte;

	while (page->multimapped || page->parent_pte) {
		if (!page->multimapped)
			parent_pte = page->parent_pte;
		else {
			struct kvm_pte_chain *chain;

			chain = container_of(page->parent_ptes.first,
					     struct kvm_pte_chain, link);
			parent_pte = chain->parent_ptes[0];
		}
705
		BUG_ON(!parent_pte);
706
		kvm_mmu_put_page(vcpu, page, parent_pte);
707
		set_shadow_pte(parent_pte, 0);
708
	}
709
	kvm_mmu_page_unlink_children(vcpu, page);
710 711
	if (!page->root_count) {
		hlist_del(&page->hash_link);
712
		kvm_mmu_free_page(vcpu, page);
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	} else
		list_move(&page->link, &vcpu->kvm->active_mmu_pages);
715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730
}

static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
{
	unsigned index;
	struct hlist_head *bucket;
	struct kvm_mmu_page *page;
	struct hlist_node *node, *n;
	int r;

	pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
	r = 0;
	index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
	bucket = &vcpu->kvm->mmu_page_hash[index];
	hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
		if (page->gfn == gfn && !page->role.metaphysical) {
731 732
			pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
				 page->role.word);
733 734 735 736
			kvm_mmu_zap_page(vcpu, page);
			r = 1;
		}
	return r;
737 738
}

739 740 741 742 743 744 745 746 747 748 749
static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
{
	struct kvm_mmu_page *page;

	while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
		pgprintk("%s: zap %lx %x\n",
			 __FUNCTION__, gfn, page->role.word);
		kvm_mmu_zap_page(vcpu, page);
	}
}

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static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
{
	int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
	struct kvm_mmu_page *page_head = page_header(__pa(pte));

	__set_bit(slot, &page_head->slot_bitmap);
}

hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
{
	hpa_t hpa = gpa_to_hpa(vcpu, gpa);

	return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
}

hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
{
	struct page *page;

	ASSERT((gpa & HPA_ERR_MASK) == 0);
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	page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
	if (!page)
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		return gpa | HPA_ERR_MASK;
	return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
		| (gpa & (PAGE_SIZE-1));
}

hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
{
	gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);

	if (gpa == UNMAPPED_GVA)
		return UNMAPPED_GVA;
	return gpa_to_hpa(vcpu, gpa);
}

786 787 788 789 790 791 792 793 794
struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
{
	gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);

	if (gpa == UNMAPPED_GVA)
		return NULL;
	return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
}

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static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
{
}

static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
{
	int level = PT32E_ROOT_LEVEL;
	hpa_t table_addr = vcpu->mmu.root_hpa;

	for (; ; level--) {
		u32 index = PT64_INDEX(v, level);
		u64 *table;
807
		u64 pte;
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		ASSERT(VALID_PAGE(table_addr));
		table = __va(table_addr);

		if (level == 1) {
813 814 815
			pte = table[index];
			if (is_present_pte(pte) && is_writeble_pte(pte))
				return 0;
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			mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
			page_header_update_slot(vcpu->kvm, table, v);
			table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
								PT_USER_MASK;
820
			rmap_add(vcpu, &table[index]);
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			return 0;
		}

		if (table[index] == 0) {
825
			struct kvm_mmu_page *new_table;
826
			gfn_t pseudo_gfn;
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828 829 830 831
			pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
				>> PAGE_SHIFT;
			new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
						     v, level - 1,
832
						     1, 0, &table[index]);
833
			if (!new_table) {
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				pgprintk("nonpaging_map: ENOMEM\n");
				return -ENOMEM;
			}

838
			table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
839
				| PT_WRITABLE_MASK | PT_USER_MASK;
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		}
		table_addr = table[index] & PT64_BASE_ADDR_MASK;
	}
}

845 846 847
static void mmu_free_roots(struct kvm_vcpu *vcpu)
{
	int i;
848
	struct kvm_mmu_page *page;
849 850 851 852 853 854

#ifdef CONFIG_X86_64
	if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
		hpa_t root = vcpu->mmu.root_hpa;

		ASSERT(VALID_PAGE(root));
855 856
		page = page_header(root);
		--page->root_count;
857 858 859 860 861 862 863
		vcpu->mmu.root_hpa = INVALID_PAGE;
		return;
	}
#endif
	for (i = 0; i < 4; ++i) {
		hpa_t root = vcpu->mmu.pae_root[i];

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		if (root) {
			ASSERT(VALID_PAGE(root));
			root &= PT64_BASE_ADDR_MASK;
			page = page_header(root);
			--page->root_count;
		}
870 871 872 873 874 875 876 877
		vcpu->mmu.pae_root[i] = INVALID_PAGE;
	}
	vcpu->mmu.root_hpa = INVALID_PAGE;
}

static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
{
	int i;
878
	gfn_t root_gfn;
879 880
	struct kvm_mmu_page *page;

881
	root_gfn = vcpu->cr3 >> PAGE_SHIFT;
882 883 884 885 886 887

#ifdef CONFIG_X86_64
	if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
		hpa_t root = vcpu->mmu.root_hpa;

		ASSERT(!VALID_PAGE(root));
888
		page = kvm_mmu_get_page(vcpu, root_gfn, 0,
889
					PT64_ROOT_LEVEL, 0, 0, NULL);
890
		root = __pa(page->spt);
891
		++page->root_count;
892 893 894 895 896 897 898 899
		vcpu->mmu.root_hpa = root;
		return;
	}
#endif
	for (i = 0; i < 4; ++i) {
		hpa_t root = vcpu->mmu.pae_root[i];

		ASSERT(!VALID_PAGE(root));
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		if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
			if (!is_present_pte(vcpu->pdptrs[i])) {
				vcpu->mmu.pae_root[i] = 0;
				continue;
			}
905
			root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
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		} else if (vcpu->mmu.root_level == 0)
907
			root_gfn = 0;
908
		page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
909
					PT32_ROOT_LEVEL, !is_paging(vcpu),
910
					0, NULL);
911
		root = __pa(page->spt);
912
		++page->root_count;
913 914 915 916 917
		vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
	}
	vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
}

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static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
{
	return vaddr;
}

static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
			       u32 error_code)
{
	gpa_t addr = gva;
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	hpa_t paddr;
928
	int r;
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930 931 932
	r = mmu_topup_memory_caches(vcpu);
	if (r)
		return r;
933

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	ASSERT(vcpu);
	ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));


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	paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
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	if (is_error_hpa(paddr))
		return 1;
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942

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	return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
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}

static void nonpaging_free(struct kvm_vcpu *vcpu)
{
948
	mmu_free_roots(vcpu);
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}

static int nonpaging_init_context(struct kvm_vcpu *vcpu)
{
	struct kvm_mmu *context = &vcpu->mmu;

	context->new_cr3 = nonpaging_new_cr3;
	context->page_fault = nonpaging_page_fault;
	context->gva_to_gpa = nonpaging_gva_to_gpa;
	context->free = nonpaging_free;
959
	context->root_level = 0;
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	context->shadow_root_level = PT32E_ROOT_LEVEL;
961
	mmu_alloc_roots(vcpu);
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	ASSERT(VALID_PAGE(context->root_hpa));
	kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
	return 0;
}

static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
{
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	++vcpu->stat.tlb_flush;
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	kvm_arch_ops->tlb_flush(vcpu);
}

static void paging_new_cr3(struct kvm_vcpu *vcpu)
{
975
	pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
976
	mmu_free_roots(vcpu);
977 978
	if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
		kvm_mmu_free_some_pages(vcpu);
979
	mmu_alloc_roots(vcpu);
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	kvm_mmu_flush_tlb(vcpu);
981
	kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
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}

static void inject_page_fault(struct kvm_vcpu *vcpu,
			      u64 addr,
			      u32 err_code)
{
	kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
}

static void paging_free(struct kvm_vcpu *vcpu)
{
	nonpaging_free(vcpu);
}

#define PTTYPE 64
#include "paging_tmpl.h"
#undef PTTYPE

#define PTTYPE 32
#include "paging_tmpl.h"
#undef PTTYPE

1004
static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
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{
	struct kvm_mmu *context = &vcpu->mmu;

	ASSERT(is_pae(vcpu));
	context->new_cr3 = paging_new_cr3;
	context->page_fault = paging64_page_fault;
	context->gva_to_gpa = paging64_gva_to_gpa;
	context->free = paging_free;
1013 1014 1015
	context->root_level = level;
	context->shadow_root_level = level;
	mmu_alloc_roots(vcpu);
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	ASSERT(VALID_PAGE(context->root_hpa));
	kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
		    (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
	return 0;
}

1022 1023 1024 1025 1026
static int paging64_init_context(struct kvm_vcpu *vcpu)
{
	return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
}

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static int paging32_init_context(struct kvm_vcpu *vcpu)
{
	struct kvm_mmu *context = &vcpu->mmu;

	context->new_cr3 = paging_new_cr3;
	context->page_fault = paging32_page_fault;
	context->gva_to_gpa = paging32_gva_to_gpa;
	context->free = paging_free;
	context->root_level = PT32_ROOT_LEVEL;
	context->shadow_root_level = PT32E_ROOT_LEVEL;
1037
	mmu_alloc_roots(vcpu);
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	ASSERT(VALID_PAGE(context->root_hpa));
	kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
		    (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
	return 0;
}

static int paging32E_init_context(struct kvm_vcpu *vcpu)
{
1046
	return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
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}

static int init_kvm_mmu(struct kvm_vcpu *vcpu)
{
	ASSERT(vcpu);
	ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));

1054
	mmu_topup_memory_caches(vcpu);
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	if (!is_paging(vcpu))
		return nonpaging_init_context(vcpu);
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	else if (is_long_mode(vcpu))
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		return paging64_init_context(vcpu);
	else if (is_pae(vcpu))
		return paging32E_init_context(vcpu);
	else
		return paging32_init_context(vcpu);
}

static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
{
	ASSERT(vcpu);
	if (VALID_PAGE(vcpu->mmu.root_hpa)) {
		vcpu->mmu.free(vcpu);
		vcpu->mmu.root_hpa = INVALID_PAGE;
	}
}

int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
{
1076 1077
	int r;

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	destroy_kvm_mmu(vcpu);
1079 1080 1081
	r = init_kvm_mmu(vcpu);
	if (r < 0)
		goto out;
1082
	r = mmu_topup_memory_caches(vcpu);
1083 1084
out:
	return r;
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}

1087
static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105
				  struct kvm_mmu_page *page,
				  u64 *spte)
{
	u64 pte;
	struct kvm_mmu_page *child;

	pte = *spte;
	if (is_present_pte(pte)) {
		if (page->role.level == PT_PAGE_TABLE_LEVEL)
			rmap_remove(vcpu, spte);
		else {
			child = page_header(pte & PT64_BASE_ADDR_MASK);
			mmu_page_remove_parent_pte(vcpu, child, spte);
		}
	}
	*spte = 0;
}

1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119
static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
				  struct kvm_mmu_page *page,
				  u64 *spte,
				  const void *new, int bytes)
{
	if (page->role.level != PT_PAGE_TABLE_LEVEL)
		return;

	if (page->role.glevels == PT32_ROOT_LEVEL)
		paging32_update_pte(vcpu, page, spte, new, bytes);
	else
		paging64_update_pte(vcpu, page, spte, new, bytes);
}

1120 1121
void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
		       const u8 *old, const u8 *new, int bytes)
1122
{
1123 1124
	gfn_t gfn = gpa >> PAGE_SHIFT;
	struct kvm_mmu_page *page;
1125
	struct hlist_node *node, *n;
1126 1127 1128 1129
	struct hlist_head *bucket;
	unsigned index;
	u64 *spte;
	unsigned offset = offset_in_page(gpa);
1130
	unsigned pte_size;
1131
	unsigned page_offset;
1132
	unsigned misaligned;
1133
	unsigned quadrant;
1134
	int level;
1135
	int flooded = 0;
1136
	int npte;
1137

1138
	pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1139 1140 1141 1142 1143 1144 1145 1146
	if (gfn == vcpu->last_pt_write_gfn) {
		++vcpu->last_pt_write_count;
		if (vcpu->last_pt_write_count >= 3)
			flooded = 1;
	} else {
		vcpu->last_pt_write_gfn = gfn;
		vcpu->last_pt_write_count = 1;
	}
1147 1148
	index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
	bucket = &vcpu->kvm->mmu_page_hash[index];
1149
	hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1150 1151
		if (page->gfn != gfn || page->role.metaphysical)
			continue;
1152 1153
		pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
		misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1154
		misaligned |= bytes < 4;
1155
		if (misaligned || flooded) {
1156 1157 1158 1159
			/*
			 * Misaligned accesses are too much trouble to fix
			 * up; also, they usually indicate a page is not used
			 * as a page table.
1160 1161 1162 1163 1164
			 *
			 * If we're seeing too many writes to a page,
			 * it may no longer be a page table, or we may be
			 * forking, in which case it is better to unmap the
			 * page.
1165 1166 1167 1168 1169 1170
			 */
			pgprintk("misaligned: gpa %llx bytes %d role %x\n",
				 gpa, bytes, page->role.word);
			kvm_mmu_zap_page(vcpu, page);
			continue;
		}
1171 1172
		page_offset = offset;
		level = page->role.level;
1173
		npte = 1;
1174
		if (page->role.glevels == PT32_ROOT_LEVEL) {
1175 1176 1177 1178 1179 1180 1181
			page_offset <<= 1;	/* 32->64 */
			/*
			 * A 32-bit pde maps 4MB while the shadow pdes map
			 * only 2MB.  So we need to double the offset again
			 * and zap two pdes instead of one.
			 */
			if (level == PT32_ROOT_LEVEL) {
1182
				page_offset &= ~7; /* kill rounding error */
1183 1184 1185
				page_offset <<= 1;
				npte = 2;
			}
1186
			quadrant = page_offset >> PAGE_SHIFT;
1187
			page_offset &= ~PAGE_MASK;
1188 1189
			if (quadrant != page->role.quadrant)
				continue;
1190
		}
1191
		spte = &page->spt[page_offset / sizeof(*spte)];
1192
		while (npte--) {
1193
			mmu_pte_write_zap_pte(vcpu, page, spte);
1194
			mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
1195
			++spte;
1196 1197
		}
	}
1198 1199
}

1200 1201 1202 1203 1204 1205 1206
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
{
	gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);

	return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
}

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void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
{
	while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
		struct kvm_mmu_page *page;

		page = container_of(vcpu->kvm->active_mmu_pages.prev,
				    struct kvm_mmu_page, link);
		kvm_mmu_zap_page(vcpu, page);
	}
}
EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);

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static void free_mmu_pages(struct kvm_vcpu *vcpu)
{
1221
	struct kvm_mmu_page *page;
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1223 1224 1225 1226 1227
	while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
		page = container_of(vcpu->kvm->active_mmu_pages.next,
				    struct kvm_mmu_page, link);
		kvm_mmu_zap_page(vcpu, page);
	}
1228
	free_page((unsigned long)vcpu->mmu.pae_root);
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1229 1230 1231 1232
}

static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
{
1233
	struct page *page;
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	int i;

	ASSERT(vcpu);

1238
	vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251

	/*
	 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
	 * Therefore we need to allocate shadow page tables in the first
	 * 4GB of memory, which happens to fit the DMA32 zone.
	 */
	page = alloc_page(GFP_KERNEL | __GFP_DMA32);
	if (!page)
		goto error_1;
	vcpu->mmu.pae_root = page_address(page);
	for (i = 0; i < 4; ++i)
		vcpu->mmu.pae_root[i] = INVALID_PAGE;

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	return 0;

error_1:
	free_mmu_pages(vcpu);
	return -ENOMEM;
}

1259
int kvm_mmu_create(struct kvm_vcpu *vcpu)
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1260 1261 1262 1263
{
	ASSERT(vcpu);
	ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));

1264 1265
	return alloc_mmu_pages(vcpu);
}
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1266

1267 1268 1269 1270
int kvm_mmu_setup(struct kvm_vcpu *vcpu)
{
	ASSERT(vcpu);
	ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1271

1272
	return init_kvm_mmu(vcpu);
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1273 1274 1275 1276 1277 1278 1279 1280
}

void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
{
	ASSERT(vcpu);

	destroy_kvm_mmu(vcpu);
	free_mmu_pages(vcpu);
1281
	mmu_free_memory_caches(vcpu);
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1282 1283
}

1284
void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
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1285
{
1286
	struct kvm *kvm = vcpu->kvm;
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1287 1288 1289 1290 1291 1292 1293 1294 1295
	struct kvm_mmu_page *page;

	list_for_each_entry(page, &kvm->active_mmu_pages, link) {
		int i;
		u64 *pt;

		if (!test_bit(slot, &page->slot_bitmap))
			continue;

1296
		pt = page->spt;
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1297 1298
		for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
			/* avoid RMW */
1299
			if (pt[i] & PT_WRITABLE_MASK) {
1300
				rmap_remove(vcpu, &pt[i]);
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				pt[i] &= ~PT_WRITABLE_MASK;
1302
			}
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1303 1304
	}
}
1305

D
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1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322
void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
{
	destroy_kvm_mmu(vcpu);

	while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
		struct kvm_mmu_page *page;

		page = container_of(vcpu->kvm->active_mmu_pages.next,
				    struct kvm_mmu_page, link);
		kvm_mmu_zap_page(vcpu, page);
	}

	mmu_free_memory_caches(vcpu);
	kvm_arch_ops->tlb_flush(vcpu);
	init_kvm_mmu(vcpu);
}

1323 1324 1325 1326 1327 1328
void kvm_mmu_module_exit(void)
{
	if (pte_chain_cache)
		kmem_cache_destroy(pte_chain_cache);
	if (rmap_desc_cache)
		kmem_cache_destroy(rmap_desc_cache);
1329 1330 1331 1332
	if (mmu_page_cache)
		kmem_cache_destroy(mmu_page_cache);
	if (mmu_page_header_cache)
		kmem_cache_destroy(mmu_page_header_cache);
1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347
}

int kvm_mmu_module_init(void)
{
	pte_chain_cache = kmem_cache_create("kvm_pte_chain",
					    sizeof(struct kvm_pte_chain),
					    0, 0, NULL, NULL);
	if (!pte_chain_cache)
		goto nomem;
	rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
					    sizeof(struct kvm_rmap_desc),
					    0, 0, NULL, NULL);
	if (!rmap_desc_cache)
		goto nomem;

1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359
	mmu_page_cache = kmem_cache_create("kvm_mmu_page",
					   PAGE_SIZE,
					   PAGE_SIZE, 0, NULL, NULL);
	if (!mmu_page_cache)
		goto nomem;

	mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
						  sizeof(struct kvm_mmu_page),
						  0, 0, NULL, NULL);
	if (!mmu_page_header_cache)
		goto nomem;

1360 1361 1362 1363 1364 1365 1366
	return 0;

nomem:
	kvm_mmu_module_exit();
	return -ENOMEM;
}

1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388
#ifdef AUDIT

static const char *audit_msg;

static gva_t canonicalize(gva_t gva)
{
#ifdef CONFIG_X86_64
	gva = (long long)(gva << 16) >> 16;
#endif
	return gva;
}

static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
				gva_t va, int level)
{
	u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
	int i;
	gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));

	for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
		u64 ent = pt[i];

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Adrian Bunk 已提交
1389
		if (!(ent & PT_PRESENT_MASK))
1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410
			continue;

		va = canonicalize(va);
		if (level > 1)
			audit_mappings_page(vcpu, ent, va, level - 1);
		else {
			gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
			hpa_t hpa = gpa_to_hpa(vcpu, gpa);

			if ((ent & PT_PRESENT_MASK)
			    && (ent & PT64_BASE_ADDR_MASK) != hpa)
				printk(KERN_ERR "audit error: (%s) levels %d"
				       " gva %lx gpa %llx hpa %llx ent %llx\n",
				       audit_msg, vcpu->mmu.root_level,
				       va, gpa, hpa, ent);
		}
	}
}

static void audit_mappings(struct kvm_vcpu *vcpu)
{
1411
	unsigned i;
1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462

	if (vcpu->mmu.root_level == 4)
		audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
	else
		for (i = 0; i < 4; ++i)
			if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
				audit_mappings_page(vcpu,
						    vcpu->mmu.pae_root[i],
						    i << 30,
						    2);
}

static int count_rmaps(struct kvm_vcpu *vcpu)
{
	int nmaps = 0;
	int i, j, k;

	for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
		struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
		struct kvm_rmap_desc *d;

		for (j = 0; j < m->npages; ++j) {
			struct page *page = m->phys_mem[j];

			if (!page->private)
				continue;
			if (!(page->private & 1)) {
				++nmaps;
				continue;
			}
			d = (struct kvm_rmap_desc *)(page->private & ~1ul);
			while (d) {
				for (k = 0; k < RMAP_EXT; ++k)
					if (d->shadow_ptes[k])
						++nmaps;
					else
						break;
				d = d->more;
			}
		}
	}
	return nmaps;
}

static int count_writable_mappings(struct kvm_vcpu *vcpu)
{
	int nmaps = 0;
	struct kvm_mmu_page *page;
	int i;

	list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1463
		u64 *pt = page->spt;
1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525

		if (page->role.level != PT_PAGE_TABLE_LEVEL)
			continue;

		for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
			u64 ent = pt[i];

			if (!(ent & PT_PRESENT_MASK))
				continue;
			if (!(ent & PT_WRITABLE_MASK))
				continue;
			++nmaps;
		}
	}
	return nmaps;
}

static void audit_rmap(struct kvm_vcpu *vcpu)
{
	int n_rmap = count_rmaps(vcpu);
	int n_actual = count_writable_mappings(vcpu);

	if (n_rmap != n_actual)
		printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
		       __FUNCTION__, audit_msg, n_rmap, n_actual);
}

static void audit_write_protection(struct kvm_vcpu *vcpu)
{
	struct kvm_mmu_page *page;

	list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
		hfn_t hfn;
		struct page *pg;

		if (page->role.metaphysical)
			continue;

		hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
			>> PAGE_SHIFT;
		pg = pfn_to_page(hfn);
		if (pg->private)
			printk(KERN_ERR "%s: (%s) shadow page has writable"
			       " mappings: gfn %lx role %x\n",
			       __FUNCTION__, audit_msg, page->gfn,
			       page->role.word);
	}
}

static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
{
	int olddbg = dbg;

	dbg = 0;
	audit_msg = msg;
	audit_rmap(vcpu);
	audit_write_protection(vcpu);
	audit_mappings(vcpu);
	dbg = olddbg;
}

#endif