mce.c 60.1 KB
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/*
 * Machine check handler.
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 *
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 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
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 * Rest from unknown author(s).
 * 2004 Andi Kleen. Rewrote most of it.
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 * Copyright 2008 Intel Corporation
 * Author: Andi Kleen
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 */
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

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#include <linux/thread_info.h>
#include <linux/capability.h>
#include <linux/miscdevice.h>
#include <linux/ratelimit.h>
#include <linux/kallsyms.h>
#include <linux/rcupdate.h>
#include <linux/kobject.h>
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#include <linux/uaccess.h>
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#include <linux/kdebug.h>
#include <linux/kernel.h>
#include <linux/percpu.h>
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#include <linux/string.h>
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#include <linux/device.h>
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#include <linux/syscore_ops.h>
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#include <linux/delay.h>
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#include <linux/ctype.h>
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#include <linux/sched.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/init.h>
#include <linux/kmod.h>
#include <linux/poll.h>
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#include <linux/nmi.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/debugfs.h>
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#include <linux/irq_work.h>
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#include <linux/export.h>
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#include <asm/processor.h>
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#include <asm/mce.h>
#include <asm/msr.h>
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#include "mce-internal.h"
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static DEFINE_MUTEX(mce_chrdev_read_mutex);
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#define rcu_dereference_check_mce(p) \
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	rcu_dereference_index_check((p), \
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			      rcu_read_lock_sched_held() || \
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			      lockdep_is_held(&mce_chrdev_read_mutex))
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#define CREATE_TRACE_POINTS
#include <trace/events/mce.h>

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#define SPINUNIT 100	/* 100ns */

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DEFINE_PER_CPU(unsigned, mce_exception_count);

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struct mce_bank *mce_banks __read_mostly;
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struct mca_config mca_cfg __read_mostly = {
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	.bootlog  = -1,
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	/*
	 * Tolerant levels:
	 * 0: always panic on uncorrected errors, log corrected errors
	 * 1: panic or SIGBUS on uncorrected errors, log corrected errors
	 * 2: SIGBUS or log uncorrected errors (if possible), log corr. errors
	 * 3: never panic or SIGBUS, log all errors (for testing only)
	 */
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	.tolerant = 1,
	.monarch_timeout = -1
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};

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/* User mode helper program triggered by machine check event */
static unsigned long		mce_need_notify;
static char			mce_helper[128];
static char			*mce_helper_argv[2] = { mce_helper, NULL };
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static DECLARE_WAIT_QUEUE_HEAD(mce_chrdev_wait);

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static DEFINE_PER_CPU(struct mce, mces_seen);
static int			cpu_missing;

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/* CMCI storm detection filter */
static DEFINE_PER_CPU(unsigned long, mce_polled_error);

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/*
 * MCA banks polled by the period polling timer for corrected events.
 * With Intel CMCI, this only has MCA banks which do not support CMCI (if any).
 */
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DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
	[0 ... BITS_TO_LONGS(MAX_NR_BANKS)-1] = ~0UL
};

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/*
 * MCA banks controlled through firmware first for corrected errors.
 * This is a global list of banks for which we won't enable CMCI and we
 * won't poll. Firmware controls these banks and is responsible for
 * reporting corrected errors through GHES. Uncorrected/recoverable
 * errors are still notified through a machine check.
 */
mce_banks_t mce_banks_ce_disabled;

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static DEFINE_PER_CPU(struct work_struct, mce_work);

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static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);

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/*
 * CPU/chipset specific EDAC code can register a notifier call here to print
 * MCE errors in a human-readable form.
 */
ATOMIC_NOTIFIER_HEAD(x86_mce_decoder_chain);

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/* Do initial initialization of a struct mce */
void mce_setup(struct mce *m)
{
	memset(m, 0, sizeof(struct mce));
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	m->cpu = m->extcpu = smp_processor_id();
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	rdtscll(m->tsc);
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	/* We hope get_seconds stays lockless */
	m->time = get_seconds();
	m->cpuvendor = boot_cpu_data.x86_vendor;
	m->cpuid = cpuid_eax(1);
	m->socketid = cpu_data(m->extcpu).phys_proc_id;
	m->apicid = cpu_data(m->extcpu).initial_apicid;
	rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
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}

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DEFINE_PER_CPU(struct mce, injectm);
EXPORT_PER_CPU_SYMBOL_GPL(injectm);

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/*
 * Lockless MCE logging infrastructure.
 * This avoids deadlocks on printk locks without having to break locks. Also
 * separate MCEs from kernel messages to avoid bogus bug reports.
 */

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static struct mce_log mcelog = {
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	.signature	= MCE_LOG_SIGNATURE,
	.len		= MCE_LOG_LEN,
	.recordlen	= sizeof(struct mce),
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};
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void mce_log(struct mce *mce)
{
	unsigned next, entry;
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	int ret = 0;
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	/* Emit the trace record: */
	trace_mce_record(mce);

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	ret = atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, mce);
	if (ret == NOTIFY_STOP)
		return;

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	mce->finished = 0;
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	wmb();
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	for (;;) {
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		entry = rcu_dereference_check_mce(mcelog.next);
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		for (;;) {
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			/*
			 * When the buffer fills up discard new entries.
			 * Assume that the earlier errors are the more
			 * interesting ones:
			 */
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			if (entry >= MCE_LOG_LEN) {
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				set_bit(MCE_OVERFLOW,
					(unsigned long *)&mcelog.flags);
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				return;
			}
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			/* Old left over entry. Skip: */
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			if (mcelog.entry[entry].finished) {
				entry++;
				continue;
			}
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			break;
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		}
		smp_rmb();
		next = entry + 1;
		if (cmpxchg(&mcelog.next, entry, next) == entry)
			break;
	}
	memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
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	wmb();
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	mcelog.entry[entry].finished = 1;
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	wmb();
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	mce->finished = 1;
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	set_bit(0, &mce_need_notify);
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}

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static void drain_mcelog_buffer(void)
{
	unsigned int next, i, prev = 0;

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	next = ACCESS_ONCE(mcelog.next);
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	do {
		struct mce *m;

		/* drain what was logged during boot */
		for (i = prev; i < next; i++) {
			unsigned long start = jiffies;
			unsigned retries = 1;

			m = &mcelog.entry[i];

			while (!m->finished) {
				if (time_after_eq(jiffies, start + 2*retries))
					retries++;

				cpu_relax();

				if (!m->finished && retries >= 4) {
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					pr_err("skipping error being logged currently!\n");
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					break;
				}
			}
			smp_rmb();
			atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, m);
		}

		memset(mcelog.entry + prev, 0, (next - prev) * sizeof(*m));
		prev = next;
		next = cmpxchg(&mcelog.next, prev, 0);
	} while (next != prev);
}


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void mce_register_decode_chain(struct notifier_block *nb)
{
	atomic_notifier_chain_register(&x86_mce_decoder_chain, nb);
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	drain_mcelog_buffer();
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}
EXPORT_SYMBOL_GPL(mce_register_decode_chain);

void mce_unregister_decode_chain(struct notifier_block *nb)
{
	atomic_notifier_chain_unregister(&x86_mce_decoder_chain, nb);
}
EXPORT_SYMBOL_GPL(mce_unregister_decode_chain);

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static void print_mce(struct mce *m)
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{
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	int ret = 0;

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	pr_emerg(HW_ERR "CPU %d: Machine Check Exception: %Lx Bank %d: %016Lx\n",
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	       m->extcpu, m->mcgstatus, m->bank, m->status);
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	if (m->ip) {
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		pr_emerg(HW_ERR "RIP%s %02x:<%016Lx> ",
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			!(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
				m->cs, m->ip);

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		if (m->cs == __KERNEL_CS)
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			print_symbol("{%s}", m->ip);
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		pr_cont("\n");
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	}
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	pr_emerg(HW_ERR "TSC %llx ", m->tsc);
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	if (m->addr)
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		pr_cont("ADDR %llx ", m->addr);
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	if (m->misc)
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		pr_cont("MISC %llx ", m->misc);
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	pr_cont("\n");
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	/*
	 * Note this output is parsed by external tools and old fields
	 * should not be changed.
	 */
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	pr_emerg(HW_ERR "PROCESSOR %u:%x TIME %llu SOCKET %u APIC %x microcode %x\n",
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		m->cpuvendor, m->cpuid, m->time, m->socketid, m->apicid,
		cpu_data(m->extcpu).microcode);
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	/*
	 * Print out human-readable details about the MCE error,
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	 * (if the CPU has an implementation for that)
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	 */
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	ret = atomic_notifier_call_chain(&x86_mce_decoder_chain, 0, m);
	if (ret == NOTIFY_STOP)
		return;

	pr_emerg_ratelimited(HW_ERR "Run the above through 'mcelog --ascii'\n");
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}

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#define PANIC_TIMEOUT 5 /* 5 seconds */

static atomic_t mce_paniced;

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static int fake_panic;
static atomic_t mce_fake_paniced;

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/* Panic in progress. Enable interrupts and wait for final IPI */
static void wait_for_panic(void)
{
	long timeout = PANIC_TIMEOUT*USEC_PER_SEC;
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	preempt_disable();
	local_irq_enable();
	while (timeout-- > 0)
		udelay(1);
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	if (panic_timeout == 0)
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		panic_timeout = mca_cfg.panic_timeout;
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	panic("Panicing machine check CPU died");
}

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static void mce_panic(char *msg, struct mce *final, char *exp)
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{
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	int i, apei_err = 0;
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	if (!fake_panic) {
		/*
		 * Make sure only one CPU runs in machine check panic
		 */
		if (atomic_inc_return(&mce_paniced) > 1)
			wait_for_panic();
		barrier();
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		bust_spinlocks(1);
		console_verbose();
	} else {
		/* Don't log too much for fake panic */
		if (atomic_inc_return(&mce_fake_paniced) > 1)
			return;
	}
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	/* First print corrected ones that are still unlogged */
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	for (i = 0; i < MCE_LOG_LEN; i++) {
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		struct mce *m = &mcelog.entry[i];
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		if (!(m->status & MCI_STATUS_VAL))
			continue;
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		if (!(m->status & MCI_STATUS_UC)) {
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			print_mce(m);
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			if (!apei_err)
				apei_err = apei_write_mce(m);
		}
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	}
	/* Now print uncorrected but with the final one last */
	for (i = 0; i < MCE_LOG_LEN; i++) {
		struct mce *m = &mcelog.entry[i];
		if (!(m->status & MCI_STATUS_VAL))
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			continue;
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		if (!(m->status & MCI_STATUS_UC))
			continue;
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		if (!final || memcmp(m, final, sizeof(struct mce))) {
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			print_mce(m);
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			if (!apei_err)
				apei_err = apei_write_mce(m);
		}
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	}
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	if (final) {
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		print_mce(final);
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		if (!apei_err)
			apei_err = apei_write_mce(final);
	}
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	if (cpu_missing)
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		pr_emerg(HW_ERR "Some CPUs didn't answer in synchronization\n");
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	if (exp)
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		pr_emerg(HW_ERR "Machine check: %s\n", exp);
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	if (!fake_panic) {
		if (panic_timeout == 0)
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			panic_timeout = mca_cfg.panic_timeout;
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		panic(msg);
	} else
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		pr_emerg(HW_ERR "Fake kernel panic: %s\n", msg);
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}
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/* Support code for software error injection */

static int msr_to_offset(u32 msr)
{
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	unsigned bank = __this_cpu_read(injectm.bank);
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	if (msr == mca_cfg.rip_msr)
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		return offsetof(struct mce, ip);
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	if (msr == MSR_IA32_MCx_STATUS(bank))
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		return offsetof(struct mce, status);
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	if (msr == MSR_IA32_MCx_ADDR(bank))
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		return offsetof(struct mce, addr);
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	if (msr == MSR_IA32_MCx_MISC(bank))
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		return offsetof(struct mce, misc);
	if (msr == MSR_IA32_MCG_STATUS)
		return offsetof(struct mce, mcgstatus);
	return -1;
}

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/* MSR access wrappers used for error injection */
static u64 mce_rdmsrl(u32 msr)
{
	u64 v;
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	if (__this_cpu_read(injectm.finished)) {
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		int offset = msr_to_offset(msr);
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		if (offset < 0)
			return 0;
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		return *(u64 *)((char *)this_cpu_ptr(&injectm) + offset);
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	}
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	if (rdmsrl_safe(msr, &v)) {
		WARN_ONCE(1, "mce: Unable to read msr %d!\n", msr);
		/*
		 * Return zero in case the access faulted. This should
		 * not happen normally but can happen if the CPU does
		 * something weird, or if the code is buggy.
		 */
		v = 0;
	}

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	return v;
}

static void mce_wrmsrl(u32 msr, u64 v)
{
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	if (__this_cpu_read(injectm.finished)) {
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		int offset = msr_to_offset(msr);
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		if (offset >= 0)
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			*(u64 *)((char *)this_cpu_ptr(&injectm) + offset) = v;
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		return;
	}
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	wrmsrl(msr, v);
}

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/*
 * Collect all global (w.r.t. this processor) status about this machine
 * check into our "mce" struct so that we can use it later to assess
 * the severity of the problem as we read per-bank specific details.
 */
static inline void mce_gather_info(struct mce *m, struct pt_regs *regs)
{
	mce_setup(m);

	m->mcgstatus = mce_rdmsrl(MSR_IA32_MCG_STATUS);
	if (regs) {
		/*
		 * Get the address of the instruction at the time of
		 * the machine check error.
		 */
		if (m->mcgstatus & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) {
			m->ip = regs->ip;
			m->cs = regs->cs;
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			/*
			 * When in VM86 mode make the cs look like ring 3
			 * always. This is a lie, but it's better than passing
			 * the additional vm86 bit around everywhere.
			 */
			if (v8086_mode(regs))
				m->cs |= 3;
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		}
		/* Use accurate RIP reporting if available. */
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		if (mca_cfg.rip_msr)
			m->ip = mce_rdmsrl(mca_cfg.rip_msr);
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	}
}

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/*
 * Simple lockless ring to communicate PFNs from the exception handler with the
 * process context work function. This is vastly simplified because there's
 * only a single reader and a single writer.
 */
#define MCE_RING_SIZE 16	/* we use one entry less */

struct mce_ring {
	unsigned short start;
	unsigned short end;
	unsigned long ring[MCE_RING_SIZE];
};
static DEFINE_PER_CPU(struct mce_ring, mce_ring);

/* Runs with CPU affinity in workqueue */
static int mce_ring_empty(void)
{
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	struct mce_ring *r = this_cpu_ptr(&mce_ring);
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	return r->start == r->end;
}

static int mce_ring_get(unsigned long *pfn)
{
	struct mce_ring *r;
	int ret = 0;

	*pfn = 0;
	get_cpu();
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	r = this_cpu_ptr(&mce_ring);
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	if (r->start == r->end)
		goto out;
	*pfn = r->ring[r->start];
	r->start = (r->start + 1) % MCE_RING_SIZE;
	ret = 1;
out:
	put_cpu();
	return ret;
}

/* Always runs in MCE context with preempt off */
static int mce_ring_add(unsigned long pfn)
{
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	struct mce_ring *r = this_cpu_ptr(&mce_ring);
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	unsigned next;

	next = (r->end + 1) % MCE_RING_SIZE;
	if (next == r->start)
		return -1;
	r->ring[r->end] = pfn;
	wmb();
	r->end = next;
	return 0;
}

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int mce_available(struct cpuinfo_x86 *c)
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{
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	if (mca_cfg.disabled)
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		return 0;
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	return cpu_has(c, X86_FEATURE_MCE) && cpu_has(c, X86_FEATURE_MCA);
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}

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static void mce_schedule_work(void)
{
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	if (!mce_ring_empty())
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		schedule_work(this_cpu_ptr(&mce_work));
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}

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DEFINE_PER_CPU(struct irq_work, mce_irq_work);

static void mce_irq_work_cb(struct irq_work *entry)
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{
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	mce_notify_irq();
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	mce_schedule_work();
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}

static void mce_report_event(struct pt_regs *regs)
{
	if (regs->flags & (X86_VM_MASK|X86_EFLAGS_IF)) {
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		mce_notify_irq();
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		/*
		 * Triggering the work queue here is just an insurance
		 * policy in case the syscall exit notify handler
		 * doesn't run soon enough or ends up running on the
		 * wrong CPU (can happen when audit sleeps)
		 */
		mce_schedule_work();
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		return;
	}

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	irq_work_queue(this_cpu_ptr(&mce_irq_work));
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}

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/*
 * Read ADDR and MISC registers.
 */
static void mce_read_aux(struct mce *m, int i)
{
	if (m->status & MCI_STATUS_MISCV)
		m->misc = mce_rdmsrl(MSR_IA32_MCx_MISC(i));
	if (m->status & MCI_STATUS_ADDRV) {
		m->addr = mce_rdmsrl(MSR_IA32_MCx_ADDR(i));

		/*
		 * Mask the reported address by the reported granularity.
		 */
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		if (mca_cfg.ser && (m->status & MCI_STATUS_MISCV)) {
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			u8 shift = MCI_MISC_ADDR_LSB(m->misc);
			m->addr >>= shift;
			m->addr <<= shift;
		}
	}
}

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static bool memory_error(struct mce *m)
{
	struct cpuinfo_x86 *c = &boot_cpu_data;

	if (c->x86_vendor == X86_VENDOR_AMD) {
		/*
		 * coming soon
		 */
		return false;
	} else if (c->x86_vendor == X86_VENDOR_INTEL) {
		/*
		 * Intel SDM Volume 3B - 15.9.2 Compound Error Codes
		 *
		 * Bit 7 of the MCACOD field of IA32_MCi_STATUS is used for
		 * indicating a memory error. Bit 8 is used for indicating a
		 * cache hierarchy error. The combination of bit 2 and bit 3
		 * is used for indicating a `generic' cache hierarchy error
		 * But we can't just blindly check the above bits, because if
		 * bit 11 is set, then it is a bus/interconnect error - and
		 * either way the above bits just gives more detail on what
		 * bus/interconnect error happened. Note that bit 12 can be
		 * ignored, as it's the "filter" bit.
		 */
		return (m->status & 0xef80) == BIT(7) ||
		       (m->status & 0xef00) == BIT(8) ||
		       (m->status & 0xeffc) == 0xc;
	}

	return false;
}

609 610
DEFINE_PER_CPU(unsigned, mce_poll_count);

611
/*
612 613 614 615
 * Poll for corrected events or events that happened before reset.
 * Those are just logged through /dev/mcelog.
 *
 * This is executed in standard interrupt context.
A
Andi Kleen 已提交
616 617 618 619 620 621 622 623 624
 *
 * Note: spec recommends to panic for fatal unsignalled
 * errors here. However this would be quite problematic --
 * we would need to reimplement the Monarch handling and
 * it would mess up the exclusion between exception handler
 * and poll hander -- * so we skip this for now.
 * These cases should not happen anyways, or only when the CPU
 * is already totally * confused. In this case it's likely it will
 * not fully execute the machine check handler either.
625
 */
626
void machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
627 628
{
	struct mce m;
629
	int severity;
630 631
	int i;

632
	this_cpu_inc(mce_poll_count);
633

634
	mce_gather_info(&m, NULL);
635

636
	for (i = 0; i < mca_cfg.banks; i++) {
637
		if (!mce_banks[i].ctl || !test_bit(i, *b))
638 639 640 641 642 643 644 645
			continue;

		m.misc = 0;
		m.addr = 0;
		m.bank = i;
		m.tsc = 0;

		barrier();
646
		m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
647 648 649
		if (!(m.status & MCI_STATUS_VAL))
			continue;

I
Ingo Molnar 已提交
650
		this_cpu_write(mce_polled_error, 1);
651
		/*
A
Andi Kleen 已提交
652 653
		 * Uncorrected or signalled events are handled by the exception
		 * handler when it is enabled, so don't process those here.
654 655 656
		 *
		 * TBD do the same check for MCI_STATUS_EN here?
		 */
A
Andi Kleen 已提交
657
		if (!(flags & MCP_UC) &&
658
		    (m.status & (mca_cfg.ser ? MCI_STATUS_S : MCI_STATUS_UC)))
659 660
			continue;

661
		mce_read_aux(&m, i);
662 663 664

		if (!(flags & MCP_TIMESTAMP))
			m.tsc = 0;
665 666 667 668 669 670 671 672 673 674 675 676 677 678

		severity = mce_severity(&m, mca_cfg.tolerant, NULL, false);

		/*
		 * In the cases where we don't have a valid address after all,
		 * do not add it into the ring buffer.
		 */
		if (severity == MCE_DEFERRED_SEVERITY && memory_error(&m)) {
			if (m.status & MCI_STATUS_ADDRV) {
				mce_ring_add(m.addr >> PAGE_SHIFT);
				mce_schedule_work();
			}
		}

679 680 681 682
		/*
		 * Don't get the IP here because it's unlikely to
		 * have anything to do with the actual error location.
		 */
683
		if (!(flags & MCP_DONTLOG) && !mca_cfg.dont_log_ce)
A
Andi Kleen 已提交
684
			mce_log(&m);
685 686 687 688

		/*
		 * Clear state for this bank.
		 */
689
		mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
690 691 692 693 694 695
	}

	/*
	 * Don't clear MCG_STATUS here because it's only defined for
	 * exceptions.
	 */
696 697

	sync_core();
698
}
699
EXPORT_SYMBOL_GPL(machine_check_poll);
700

701 702 703 704
/*
 * Do a quick check if any of the events requires a panic.
 * This decides if we keep the events around or clear them.
 */
705 706
static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
			  struct pt_regs *regs)
707
{
708
	int i, ret = 0;
709

710
	for (i = 0; i < mca_cfg.banks; i++) {
711
		m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
712
		if (m->status & MCI_STATUS_VAL) {
713
			__set_bit(i, validp);
714 715 716
			if (quirk_no_way_out)
				quirk_no_way_out(i, m, regs);
		}
717 718
		if (mce_severity(m, mca_cfg.tolerant, msg, true) >=
		    MCE_PANIC_SEVERITY)
719
			ret = 1;
720
	}
721
	return ret;
722 723
}

724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748
/*
 * Variable to establish order between CPUs while scanning.
 * Each CPU spins initially until executing is equal its number.
 */
static atomic_t mce_executing;

/*
 * Defines order of CPUs on entry. First CPU becomes Monarch.
 */
static atomic_t mce_callin;

/*
 * Check if a timeout waiting for other CPUs happened.
 */
static int mce_timed_out(u64 *t)
{
	/*
	 * The others already did panic for some reason.
	 * Bail out like in a timeout.
	 * rmb() to tell the compiler that system_state
	 * might have been modified by someone else.
	 */
	rmb();
	if (atomic_read(&mce_paniced))
		wait_for_panic();
749
	if (!mca_cfg.monarch_timeout)
750 751
		goto out;
	if ((s64)*t < SPINUNIT) {
752
		if (mca_cfg.tolerant <= 1)
753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775
			mce_panic("Timeout synchronizing machine check over CPUs",
				  NULL, NULL);
		cpu_missing = 1;
		return 1;
	}
	*t -= SPINUNIT;
out:
	touch_nmi_watchdog();
	return 0;
}

/*
 * The Monarch's reign.  The Monarch is the CPU who entered
 * the machine check handler first. It waits for the others to
 * raise the exception too and then grades them. When any
 * error is fatal panic. Only then let the others continue.
 *
 * The other CPUs entering the MCE handler will be controlled by the
 * Monarch. They are called Subjects.
 *
 * This way we prevent any potential data corruption in a unrecoverable case
 * and also makes sure always all CPU's errors are examined.
 *
776
 * Also this detects the case of a machine check event coming from outer
777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801
 * space (not detected by any CPUs) In this case some external agent wants
 * us to shut down, so panic too.
 *
 * The other CPUs might still decide to panic if the handler happens
 * in a unrecoverable place, but in this case the system is in a semi-stable
 * state and won't corrupt anything by itself. It's ok to let the others
 * continue for a bit first.
 *
 * All the spin loops have timeouts; when a timeout happens a CPU
 * typically elects itself to be Monarch.
 */
static void mce_reign(void)
{
	int cpu;
	struct mce *m = NULL;
	int global_worst = 0;
	char *msg = NULL;
	char *nmsg = NULL;

	/*
	 * This CPU is the Monarch and the other CPUs have run
	 * through their handlers.
	 * Grade the severity of the errors of all the CPUs.
	 */
	for_each_possible_cpu(cpu) {
802 803
		int severity = mce_severity(&per_cpu(mces_seen, cpu),
					    mca_cfg.tolerant,
804
					    &nmsg, true);
805 806 807 808 809 810 811 812 813 814 815 816
		if (severity > global_worst) {
			msg = nmsg;
			global_worst = severity;
			m = &per_cpu(mces_seen, cpu);
		}
	}

	/*
	 * Cannot recover? Panic here then.
	 * This dumps all the mces in the log buffer and stops the
	 * other CPUs.
	 */
817
	if (m && global_worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
818
		mce_panic("Fatal Machine check", m, msg);
819 820 821 822 823 824 825 826 827 828 829

	/*
	 * For UC somewhere we let the CPU who detects it handle it.
	 * Also must let continue the others, otherwise the handling
	 * CPU could deadlock on a lock.
	 */

	/*
	 * No machine check event found. Must be some external
	 * source or one CPU is hung. Panic.
	 */
830
	if (global_worst <= MCE_KEEP_SEVERITY && mca_cfg.tolerant < 3)
831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849
		mce_panic("Machine check from unknown source", NULL, NULL);

	/*
	 * Now clear all the mces_seen so that they don't reappear on
	 * the next mce.
	 */
	for_each_possible_cpu(cpu)
		memset(&per_cpu(mces_seen, cpu), 0, sizeof(struct mce));
}

static atomic_t global_nwo;

/*
 * Start of Monarch synchronization. This waits until all CPUs have
 * entered the exception handler and then determines if any of them
 * saw a fatal event that requires panic. Then it executes them
 * in the entry order.
 * TBD double check parallel CPU hotunplug
 */
H
Hidetoshi Seto 已提交
850
static int mce_start(int *no_way_out)
851
{
H
Hidetoshi Seto 已提交
852
	int order;
853
	int cpus = num_online_cpus();
854
	u64 timeout = (u64)mca_cfg.monarch_timeout * NSEC_PER_USEC;
855

H
Hidetoshi Seto 已提交
856 857
	if (!timeout)
		return -1;
858

H
Hidetoshi Seto 已提交
859
	atomic_add(*no_way_out, &global_nwo);
860 861 862 863
	/*
	 * global_nwo should be updated before mce_callin
	 */
	smp_wmb();
864
	order = atomic_inc_return(&mce_callin);
865 866 867 868 869 870 871

	/*
	 * Wait for everyone.
	 */
	while (atomic_read(&mce_callin) != cpus) {
		if (mce_timed_out(&timeout)) {
			atomic_set(&global_nwo, 0);
H
Hidetoshi Seto 已提交
872
			return -1;
873 874 875 876
		}
		ndelay(SPINUNIT);
	}

877 878 879 880
	/*
	 * mce_callin should be read before global_nwo
	 */
	smp_rmb();
881

H
Hidetoshi Seto 已提交
882 883 884 885
	if (order == 1) {
		/*
		 * Monarch: Starts executing now, the others wait.
		 */
886
		atomic_set(&mce_executing, 1);
H
Hidetoshi Seto 已提交
887 888 889 890 891 892 893 894 895 896 897 898 899 900
	} else {
		/*
		 * Subject: Now start the scanning loop one by one in
		 * the original callin order.
		 * This way when there are any shared banks it will be
		 * only seen by one CPU before cleared, avoiding duplicates.
		 */
		while (atomic_read(&mce_executing) < order) {
			if (mce_timed_out(&timeout)) {
				atomic_set(&global_nwo, 0);
				return -1;
			}
			ndelay(SPINUNIT);
		}
901 902 903
	}

	/*
H
Hidetoshi Seto 已提交
904
	 * Cache the global no_way_out state.
905
	 */
H
Hidetoshi Seto 已提交
906 907 908
	*no_way_out = atomic_read(&global_nwo);

	return order;
909 910 911 912 913 914 915 916 917
}

/*
 * Synchronize between CPUs after main scanning loop.
 * This invokes the bulk of the Monarch processing.
 */
static int mce_end(int order)
{
	int ret = -1;
918
	u64 timeout = (u64)mca_cfg.monarch_timeout * NSEC_PER_USEC;
919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977

	if (!timeout)
		goto reset;
	if (order < 0)
		goto reset;

	/*
	 * Allow others to run.
	 */
	atomic_inc(&mce_executing);

	if (order == 1) {
		/* CHECKME: Can this race with a parallel hotplug? */
		int cpus = num_online_cpus();

		/*
		 * Monarch: Wait for everyone to go through their scanning
		 * loops.
		 */
		while (atomic_read(&mce_executing) <= cpus) {
			if (mce_timed_out(&timeout))
				goto reset;
			ndelay(SPINUNIT);
		}

		mce_reign();
		barrier();
		ret = 0;
	} else {
		/*
		 * Subject: Wait for Monarch to finish.
		 */
		while (atomic_read(&mce_executing) != 0) {
			if (mce_timed_out(&timeout))
				goto reset;
			ndelay(SPINUNIT);
		}

		/*
		 * Don't reset anything. That's done by the Monarch.
		 */
		return 0;
	}

	/*
	 * Reset all global state.
	 */
reset:
	atomic_set(&global_nwo, 0);
	atomic_set(&mce_callin, 0);
	barrier();

	/*
	 * Let others run again.
	 */
	atomic_set(&mce_executing, 0);
	return ret;
}

978 979 980 981
/*
 * Check if the address reported by the CPU is in a format we can parse.
 * It would be possible to add code for most other cases, but all would
 * be somewhat complicated (e.g. segment offset would require an instruction
L
Lucas De Marchi 已提交
982
 * parser). So only support physical addresses up to page granuality for now.
983 984 985 986 987
 */
static int mce_usable_address(struct mce *m)
{
	if (!(m->status & MCI_STATUS_MISCV) || !(m->status & MCI_STATUS_ADDRV))
		return 0;
988
	if (MCI_MISC_ADDR_LSB(m->misc) > PAGE_SHIFT)
989
		return 0;
990
	if (MCI_MISC_ADDR_MODE(m->misc) != MCI_MISC_ADDR_PHYS)
991 992 993 994
		return 0;
	return 1;
}

995 996 997 998
static void mce_clear_state(unsigned long *toclear)
{
	int i;

999
	for (i = 0; i < mca_cfg.banks; i++) {
1000
		if (test_bit(i, toclear))
1001
			mce_wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
1002 1003 1004
	}
}

1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015
/*
 * Need to save faulting physical address associated with a process
 * in the machine check handler some place where we can grab it back
 * later in mce_notify_process()
 */
#define	MCE_INFO_MAX	16

struct mce_info {
	atomic_t		inuse;
	struct task_struct	*t;
	__u64			paddr;
1016
	int			restartable;
1017 1018
} mce_info[MCE_INFO_MAX];

1019
static void mce_save_info(__u64 addr, int c)
1020 1021 1022 1023 1024 1025 1026
{
	struct mce_info *mi;

	for (mi = mce_info; mi < &mce_info[MCE_INFO_MAX]; mi++) {
		if (atomic_cmpxchg(&mi->inuse, 0, 1) == 0) {
			mi->t = current;
			mi->paddr = addr;
1027
			mi->restartable = c;
1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049
			return;
		}
	}

	mce_panic("Too many concurrent recoverable errors", NULL, NULL);
}

static struct mce_info *mce_find_info(void)
{
	struct mce_info *mi;

	for (mi = mce_info; mi < &mce_info[MCE_INFO_MAX]; mi++)
		if (atomic_read(&mi->inuse) && mi->t == current)
			return mi;
	return NULL;
}

static void mce_clear_info(struct mce_info *mi)
{
	atomic_set(&mi->inuse, 0);
}

1050 1051 1052 1053 1054 1055 1056
/*
 * The actual machine check handler. This only handles real
 * exceptions when something got corrupted coming in through int 18.
 *
 * This is executed in NMI context not subject to normal locking rules. This
 * implies that most kernel services cannot be safely used. Don't even
 * think about putting a printk in there!
1057 1058 1059 1060
 *
 * On Intel systems this is entered on all CPUs in parallel through
 * MCE broadcast. However some CPUs might be broken beyond repair,
 * so be always careful when synchronizing with others.
L
Linus Torvalds 已提交
1061
 */
I
Ingo Molnar 已提交
1062
void do_machine_check(struct pt_regs *regs, long error_code)
L
Linus Torvalds 已提交
1063
{
1064
	struct mca_config *cfg = &mca_cfg;
1065
	struct mce m, *final;
L
Linus Torvalds 已提交
1066
	int i;
1067 1068 1069 1070 1071 1072
	int worst = 0;
	int severity;
	/*
	 * Establish sequential order between the CPUs entering the machine
	 * check handler.
	 */
H
Hidetoshi Seto 已提交
1073
	int order;
1074 1075
	/*
	 * If no_way_out gets set, there is no safe way to recover from this
1076
	 * MCE.  If mca_cfg.tolerant is cranked up, we'll try anyway.
1077 1078 1079 1080 1081 1082 1083
	 */
	int no_way_out = 0;
	/*
	 * If kill_it gets set, there might be a way to recover from this
	 * error.
	 */
	int kill_it = 0;
1084
	DECLARE_BITMAP(toclear, MAX_NR_BANKS);
1085
	DECLARE_BITMAP(valid_banks, MAX_NR_BANKS);
1086
	char *msg = "Unknown";
L
Linus Torvalds 已提交
1087

1088
	this_cpu_inc(mce_exception_count);
1089

1090
	if (!cfg->banks)
1091
		goto out;
L
Linus Torvalds 已提交
1092

1093
	mce_gather_info(&m, regs);
1094

1095
	final = this_cpu_ptr(&mces_seen);
1096 1097
	*final = m;

1098
	memset(valid_banks, 0, sizeof(valid_banks));
1099
	no_way_out = mce_no_way_out(&m, &msg, valid_banks, regs);
1100

L
Linus Torvalds 已提交
1101 1102
	barrier();

A
Andi Kleen 已提交
1103
	/*
1104 1105 1106
	 * When no restart IP might need to kill or panic.
	 * Assume the worst for now, but if we find the
	 * severity is MCE_AR_SEVERITY we have other options.
A
Andi Kleen 已提交
1107 1108 1109 1110
	 */
	if (!(m.mcgstatus & MCG_STATUS_RIPV))
		kill_it = 1;

1111 1112 1113 1114 1115
	/*
	 * Go through all the banks in exclusion of the other CPUs.
	 * This way we don't report duplicated events on shared banks
	 * because the first one to see it will clear it.
	 */
H
Hidetoshi Seto 已提交
1116
	order = mce_start(&no_way_out);
1117
	for (i = 0; i < cfg->banks; i++) {
1118
		__clear_bit(i, toclear);
1119 1120
		if (!test_bit(i, valid_banks))
			continue;
1121
		if (!mce_banks[i].ctl)
L
Linus Torvalds 已提交
1122
			continue;
1123 1124

		m.misc = 0;
L
Linus Torvalds 已提交
1125 1126 1127
		m.addr = 0;
		m.bank = i;

1128
		m.status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
L
Linus Torvalds 已提交
1129 1130 1131
		if ((m.status & MCI_STATUS_VAL) == 0)
			continue;

1132
		/*
A
Andi Kleen 已提交
1133 1134
		 * Non uncorrected or non signaled errors are handled by
		 * machine_check_poll. Leave them alone, unless this panics.
1135
		 */
1136
		if (!(m.status & (cfg->ser ? MCI_STATUS_S : MCI_STATUS_UC)) &&
A
Andi Kleen 已提交
1137
			!no_way_out)
1138 1139 1140 1141 1142
			continue;

		/*
		 * Set taint even when machine check was not enabled.
		 */
1143
		add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE);
1144

1145
		severity = mce_severity(&m, cfg->tolerant, NULL, true);
1146

A
Andi Kleen 已提交
1147
		/*
1148 1149
		 * When machine check was for corrected/deferred handler don't
		 * touch, unless we're panicing.
A
Andi Kleen 已提交
1150
		 */
1151 1152
		if ((severity == MCE_KEEP_SEVERITY ||
		     severity == MCE_UCNA_SEVERITY) && !no_way_out)
A
Andi Kleen 已提交
1153 1154 1155
			continue;
		__set_bit(i, toclear);
		if (severity == MCE_NO_SEVERITY) {
1156 1157 1158 1159 1160
			/*
			 * Machine check event was not enabled. Clear, but
			 * ignore.
			 */
			continue;
L
Linus Torvalds 已提交
1161 1162
		}

1163
		mce_read_aux(&m, i);
L
Linus Torvalds 已提交
1164

1165 1166 1167 1168 1169
		/*
		 * Action optional error. Queue address for later processing.
		 * When the ring overflows we just ignore the AO error.
		 * RED-PEN add some logging mechanism when
		 * usable_address or mce_add_ring fails.
1170
		 * RED-PEN don't ignore overflow for mca_cfg.tolerant == 0
1171 1172 1173 1174
		 */
		if (severity == MCE_AO_SEVERITY && mce_usable_address(&m))
			mce_ring_add(m.addr >> PAGE_SHIFT);

1175
		mce_log(&m);
L
Linus Torvalds 已提交
1176

1177 1178 1179
		if (severity > worst) {
			*final = m;
			worst = severity;
L
Linus Torvalds 已提交
1180 1181 1182
		}
	}

1183 1184 1185
	/* mce_clear_state will clear *final, save locally for use later */
	m = *final;

1186 1187 1188
	if (!no_way_out)
		mce_clear_state(toclear);

I
Ingo Molnar 已提交
1189
	/*
1190 1191
	 * Do most of the synchronization with other CPUs.
	 * When there's any problem use only local no_way_out state.
I
Ingo Molnar 已提交
1192
	 */
1193 1194
	if (mce_end(order) < 0)
		no_way_out = worst >= MCE_PANIC_SEVERITY;
1195 1196

	/*
1197 1198 1199 1200
	 * At insane "tolerant" levels we take no action. Otherwise
	 * we only die if we have no other choice. For less serious
	 * issues we try to recover, or limit damage to the current
	 * process.
1201
	 */
1202
	if (cfg->tolerant < 3) {
1203 1204 1205 1206
		if (no_way_out)
			mce_panic("Fatal machine check on current CPU", &m, msg);
		if (worst == MCE_AR_SEVERITY) {
			/* schedule action before return to userland */
1207
			mce_save_info(m.addr, m.mcgstatus & MCG_STATUS_RIPV);
1208 1209 1210 1211 1212
			set_thread_flag(TIF_MCE_NOTIFY);
		} else if (kill_it) {
			force_sig(SIGBUS, current);
		}
	}
1213

1214 1215
	if (worst > 0)
		mce_report_event(regs);
1216
	mce_wrmsrl(MSR_IA32_MCG_STATUS, 0);
1217
out:
1218
	sync_core();
L
Linus Torvalds 已提交
1219
}
1220
EXPORT_SYMBOL_GPL(do_machine_check);
L
Linus Torvalds 已提交
1221

1222 1223
#ifndef CONFIG_MEMORY_FAILURE
int memory_failure(unsigned long pfn, int vector, int flags)
1224
{
1225 1226
	/* mce_severity() should not hand us an ACTION_REQUIRED error */
	BUG_ON(flags & MF_ACTION_REQUIRED);
1227 1228 1229
	pr_err("Uncorrected memory error in page 0x%lx ignored\n"
	       "Rebuild kernel with CONFIG_MEMORY_FAILURE=y for smarter handling\n",
	       pfn);
1230 1231

	return 0;
1232
}
1233
#endif
1234 1235

/*
1236 1237 1238 1239 1240 1241
 * Called in process context that interrupted by MCE and marked with
 * TIF_MCE_NOTIFY, just before returning to erroneous userland.
 * This code is allowed to sleep.
 * Attempt possible recovery such as calling the high level VM handler to
 * process any corrupted pages, and kill/signal current process if required.
 * Action required errors are handled here.
1242 1243 1244 1245
 */
void mce_notify_process(void)
{
	unsigned long pfn;
1246
	struct mce_info *mi = mce_find_info();
1247
	int flags = MF_ACTION_REQUIRED;
1248 1249 1250 1251 1252 1253 1254 1255 1256

	if (!mi)
		mce_panic("Lost physical address for unconsumed uncorrectable error", NULL, NULL);
	pfn = mi->paddr >> PAGE_SHIFT;

	clear_thread_flag(TIF_MCE_NOTIFY);

	pr_err("Uncorrected hardware memory error in user-access at %llx",
		 mi->paddr);
1257 1258 1259 1260 1261
	/*
	 * We must call memory_failure() here even if the current process is
	 * doomed. We still need to mark the page as poisoned and alert any
	 * other users of the page.
	 */
1262 1263 1264
	if (!mi->restartable)
		flags |= MF_MUST_KILL;
	if (memory_failure(pfn, MCE_VECTOR, flags) < 0) {
1265 1266 1267 1268
		pr_err("Memory error not recovered");
		force_sig(SIGBUS, current);
	}
	mce_clear_info(mi);
1269 1270
}

1271 1272 1273 1274 1275
/*
 * Action optional processing happens here (picking up
 * from the list of faulting pages that do_machine_check()
 * placed into the "ring").
 */
1276 1277
static void mce_process_work(struct work_struct *dummy)
{
1278 1279 1280 1281
	unsigned long pfn;

	while (mce_ring_get(&pfn))
		memory_failure(pfn, MCE_VECTOR, 0);
1282 1283
}

1284 1285 1286
#ifdef CONFIG_X86_MCE_INTEL
/***
 * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog
S
Simon Arlott 已提交
1287
 * @cpu: The CPU on which the event occurred.
1288 1289 1290 1291 1292 1293 1294 1295 1296 1297
 * @status: Event status information
 *
 * This function should be called by the thermal interrupt after the
 * event has been processed and the decision was made to log the event
 * further.
 *
 * The status parameter will be saved to the 'status' field of 'struct mce'
 * and historically has been the register value of the
 * MSR_IA32_THERMAL_STATUS (Intel) msr.
 */
1298
void mce_log_therm_throt_event(__u64 status)
1299 1300 1301
{
	struct mce m;

1302
	mce_setup(&m);
1303 1304 1305 1306 1307 1308
	m.bank = MCE_THERMAL_BANK;
	m.status = status;
	mce_log(&m);
}
#endif /* CONFIG_X86_MCE_INTEL */

L
Linus Torvalds 已提交
1309
/*
1310 1311 1312
 * Periodic polling timer for "silent" machine check errors.  If the
 * poller finds an MCE, poll 2x faster.  When the poller finds no more
 * errors, poll 2x slower (up to check_interval seconds).
L
Linus Torvalds 已提交
1313
 */
T
Thomas Gleixner 已提交
1314
static unsigned long check_interval = 5 * 60; /* 5 minutes */
I
Ingo Molnar 已提交
1315

T
Thomas Gleixner 已提交
1316
static DEFINE_PER_CPU(unsigned long, mce_next_interval); /* in jiffies */
1317
static DEFINE_PER_CPU(struct timer_list, mce_timer);
L
Linus Torvalds 已提交
1318

C
Chen Gong 已提交
1319 1320 1321 1322 1323 1324 1325 1326
static unsigned long mce_adjust_timer_default(unsigned long interval)
{
	return interval;
}

static unsigned long (*mce_adjust_timer)(unsigned long interval) =
	mce_adjust_timer_default;

1327 1328
static int cmc_error_seen(void)
{
1329
	unsigned long *v = this_cpu_ptr(&mce_polled_error);
1330 1331 1332 1333

	return test_and_clear_bit(0, v);
}

T
Thomas Gleixner 已提交
1334
static void mce_timer_fn(unsigned long data)
L
Linus Torvalds 已提交
1335
{
1336
	struct timer_list *t = this_cpu_ptr(&mce_timer);
T
Thomas Gleixner 已提交
1337
	unsigned long iv;
1338
	int notify;
1339 1340 1341

	WARN_ON(smp_processor_id() != data);

1342
	if (mce_available(this_cpu_ptr(&cpu_info))) {
1343
		machine_check_poll(MCP_TIMESTAMP,
1344
				this_cpu_ptr(&mce_poll_banks));
C
Chen Gong 已提交
1345
		mce_intel_cmci_poll();
I
Ingo Molnar 已提交
1346
	}
L
Linus Torvalds 已提交
1347 1348

	/*
1349 1350
	 * Alert userspace if needed.  If we logged an MCE, reduce the
	 * polling interval, otherwise increase the polling interval.
L
Linus Torvalds 已提交
1351
	 */
T
Thomas Gleixner 已提交
1352
	iv = __this_cpu_read(mce_next_interval);
1353 1354 1355
	notify = mce_notify_irq();
	notify |= cmc_error_seen();
	if (notify) {
1356
		iv = max(iv / 2, (unsigned long) HZ/100);
C
Chen Gong 已提交
1357
	} else {
T
Thomas Gleixner 已提交
1358
		iv = min(iv * 2, round_jiffies_relative(check_interval * HZ));
C
Chen Gong 已提交
1359 1360
		iv = mce_adjust_timer(iv);
	}
T
Thomas Gleixner 已提交
1361
	__this_cpu_write(mce_next_interval, iv);
C
Chen Gong 已提交
1362 1363 1364 1365 1366 1367
	/* Might have become 0 after CMCI storm subsided */
	if (iv) {
		t->expires = jiffies + iv;
		add_timer_on(t, smp_processor_id());
	}
}
1368

C
Chen Gong 已提交
1369 1370 1371 1372 1373
/*
 * Ensure that the timer is firing in @interval from now.
 */
void mce_timer_kick(unsigned long interval)
{
1374
	struct timer_list *t = this_cpu_ptr(&mce_timer);
C
Chen Gong 已提交
1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386
	unsigned long when = jiffies + interval;
	unsigned long iv = __this_cpu_read(mce_next_interval);

	if (timer_pending(t)) {
		if (time_before(when, t->expires))
			mod_timer_pinned(t, when);
	} else {
		t->expires = round_jiffies(when);
		add_timer_on(t, smp_processor_id());
	}
	if (interval < iv)
		__this_cpu_write(mce_next_interval, interval);
1387 1388
}

1389 1390 1391 1392 1393 1394 1395 1396 1397
/* Must not be called in IRQ context where del_timer_sync() can deadlock */
static void mce_timer_delete_all(void)
{
	int cpu;

	for_each_online_cpu(cpu)
		del_timer_sync(&per_cpu(mce_timer, cpu));
}

1398 1399
static void mce_do_trigger(struct work_struct *work)
{
1400
	call_usermodehelper(mce_helper, mce_helper_argv, NULL, UMH_NO_WAIT);
1401 1402 1403 1404
}

static DECLARE_WORK(mce_trigger_work, mce_do_trigger);

1405
/*
1406 1407 1408
 * Notify the user(s) about new machine check events.
 * Can be called from interrupt context, but not from machine check/NMI
 * context.
1409
 */
1410
int mce_notify_irq(void)
1411
{
1412 1413 1414
	/* Not more than two messages every minute */
	static DEFINE_RATELIMIT_STATE(ratelimit, 60*HZ, 2);

1415
	if (test_and_clear_bit(0, &mce_need_notify)) {
1416 1417
		/* wake processes polling /dev/mcelog */
		wake_up_interruptible(&mce_chrdev_wait);
1418

1419
		if (mce_helper[0])
1420
			schedule_work(&mce_trigger_work);
1421

1422
		if (__ratelimit(&ratelimit))
H
Huang Ying 已提交
1423
			pr_info(HW_ERR "Machine check events logged\n");
1424 1425

		return 1;
L
Linus Torvalds 已提交
1426
	}
1427 1428
	return 0;
}
1429
EXPORT_SYMBOL_GPL(mce_notify_irq);
1430

1431
static int __mcheck_cpu_mce_banks_init(void)
1432 1433
{
	int i;
1434
	u8 num_banks = mca_cfg.banks;
1435

1436
	mce_banks = kzalloc(num_banks * sizeof(struct mce_bank), GFP_KERNEL);
1437 1438
	if (!mce_banks)
		return -ENOMEM;
1439 1440

	for (i = 0; i < num_banks; i++) {
1441
		struct mce_bank *b = &mce_banks[i];
1442

1443 1444 1445 1446 1447 1448
		b->ctl = -1ULL;
		b->init = 1;
	}
	return 0;
}

1449
/*
L
Linus Torvalds 已提交
1450 1451
 * Initialize Machine Checks for a CPU.
 */
1452
static int __mcheck_cpu_cap_init(void)
L
Linus Torvalds 已提交
1453
{
1454
	unsigned b;
I
Ingo Molnar 已提交
1455
	u64 cap;
L
Linus Torvalds 已提交
1456 1457

	rdmsrl(MSR_IA32_MCG_CAP, cap);
1458 1459

	b = cap & MCG_BANKCNT_MASK;
1460
	if (!mca_cfg.banks)
1461
		pr_info("CPU supports %d MCE banks\n", b);
1462

1463
	if (b > MAX_NR_BANKS) {
1464
		pr_warn("Using only %u machine check banks out of %u\n",
1465 1466 1467 1468 1469
			MAX_NR_BANKS, b);
		b = MAX_NR_BANKS;
	}

	/* Don't support asymmetric configurations today */
1470 1471 1472
	WARN_ON(mca_cfg.banks != 0 && b != mca_cfg.banks);
	mca_cfg.banks = b;

1473
	if (!mce_banks) {
H
Hidetoshi Seto 已提交
1474
		int err = __mcheck_cpu_mce_banks_init();
1475

1476 1477
		if (err)
			return err;
L
Linus Torvalds 已提交
1478
	}
1479

1480
	/* Use accurate RIP reporting if available. */
1481
	if ((cap & MCG_EXT_P) && MCG_EXT_CNT(cap) >= 9)
1482
		mca_cfg.rip_msr = MSR_IA32_MCG_EIP;
L
Linus Torvalds 已提交
1483

A
Andi Kleen 已提交
1484
	if (cap & MCG_SER_P)
1485
		mca_cfg.ser = true;
A
Andi Kleen 已提交
1486

1487 1488 1489
	return 0;
}

1490
static void __mcheck_cpu_init_generic(void)
1491
{
1492
	enum mcp_flags m_fl = 0;
I
Ingo Molnar 已提交
1493
	mce_banks_t all_banks;
1494 1495 1496
	u64 cap;
	int i;

1497 1498 1499
	if (!mca_cfg.bootlog)
		m_fl = MCP_DONTLOG;

1500 1501 1502
	/*
	 * Log the machine checks left over from the previous reset.
	 */
1503
	bitmap_fill(all_banks, MAX_NR_BANKS);
1504
	machine_check_poll(MCP_UC | m_fl, &all_banks);
L
Linus Torvalds 已提交
1505 1506 1507

	set_in_cr4(X86_CR4_MCE);

1508
	rdmsrl(MSR_IA32_MCG_CAP, cap);
L
Linus Torvalds 已提交
1509 1510 1511
	if (cap & MCG_CTL_P)
		wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);

1512
	for (i = 0; i < mca_cfg.banks; i++) {
1513
		struct mce_bank *b = &mce_banks[i];
1514

1515
		if (!b->init)
1516
			continue;
1517 1518
		wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl);
		wrmsrl(MSR_IA32_MCx_STATUS(i), 0);
1519
	}
L
Linus Torvalds 已提交
1520 1521
}

1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549
/*
 * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and
 * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM
 * Vol 3B Table 15-20). But this confuses both the code that determines
 * whether the machine check occurred in kernel or user mode, and also
 * the severity assessment code. Pretend that EIPV was set, and take the
 * ip/cs values from the pt_regs that mce_gather_info() ignored earlier.
 */
static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
{
	if (bank != 0)
		return;
	if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0)
		return;
	if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC|
		          MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV|
			  MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR|
			  MCACOD)) !=
			 (MCI_STATUS_UC|MCI_STATUS_EN|
			  MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S|
			  MCI_STATUS_AR|MCACOD_INSTR))
		return;

	m->mcgstatus |= MCG_STATUS_EIPV;
	m->ip = regs->ip;
	m->cs = regs->cs;
}

L
Linus Torvalds 已提交
1550
/* Add per CPU specific workarounds here */
1551
static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
1552
{
1553 1554
	struct mca_config *cfg = &mca_cfg;

1555
	if (c->x86_vendor == X86_VENDOR_UNKNOWN) {
1556
		pr_info("unknown CPU type - not enabling MCE support\n");
1557 1558 1559
		return -EOPNOTSUPP;
	}

L
Linus Torvalds 已提交
1560
	/* This should be disabled by the BIOS, but isn't always */
1561
	if (c->x86_vendor == X86_VENDOR_AMD) {
1562
		if (c->x86 == 15 && cfg->banks > 4) {
I
Ingo Molnar 已提交
1563 1564 1565 1566 1567
			/*
			 * disable GART TBL walk error reporting, which
			 * trips off incorrectly with the IOMMU & 3ware
			 * & Cerberus:
			 */
1568
			clear_bit(10, (unsigned long *)&mce_banks[4].ctl);
I
Ingo Molnar 已提交
1569
		}
1570
		if (c->x86 <= 17 && cfg->bootlog < 0) {
I
Ingo Molnar 已提交
1571 1572 1573 1574
			/*
			 * Lots of broken BIOS around that don't clear them
			 * by default and leave crap in there. Don't log:
			 */
1575
			cfg->bootlog = 0;
I
Ingo Molnar 已提交
1576
		}
1577 1578 1579 1580
		/*
		 * Various K7s with broken bank 0 around. Always disable
		 * by default.
		 */
1581
		 if (c->x86 == 6 && cfg->banks > 0)
1582
			mce_banks[0].ctl = 0;
1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609

		 /*
		  * Turn off MC4_MISC thresholding banks on those models since
		  * they're not supported there.
		  */
		 if (c->x86 == 0x15 &&
		     (c->x86_model >= 0x10 && c->x86_model <= 0x1f)) {
			 int i;
			 u64 val, hwcr;
			 bool need_toggle;
			 u32 msrs[] = {
				0x00000413, /* MC4_MISC0 */
				0xc0000408, /* MC4_MISC1 */
			 };

			 rdmsrl(MSR_K7_HWCR, hwcr);

			 /* McStatusWrEn has to be set */
			 need_toggle = !(hwcr & BIT(18));

			 if (need_toggle)
				 wrmsrl(MSR_K7_HWCR, hwcr | BIT(18));

			 for (i = 0; i < ARRAY_SIZE(msrs); i++) {
				 rdmsrl(msrs[i], val);

				 /* CntP bit set? */
B
Borislav Petkov 已提交
1610 1611 1612
				 if (val & BIT_64(62)) {
					val &= ~BIT_64(62);
					wrmsrl(msrs[i], val);
1613 1614 1615 1616 1617 1618 1619
				 }
			 }

			 /* restore old settings */
			 if (need_toggle)
				 wrmsrl(MSR_K7_HWCR, hwcr);
		 }
L
Linus Torvalds 已提交
1620
	}
1621

1622 1623 1624 1625 1626 1627 1628 1629 1630 1631
	if (c->x86_vendor == X86_VENDOR_INTEL) {
		/*
		 * SDM documents that on family 6 bank 0 should not be written
		 * because it aliases to another special BIOS controlled
		 * register.
		 * But it's not aliased anymore on model 0x1a+
		 * Don't ignore bank 0 completely because there could be a
		 * valid event later, merely don't write CTL0.
		 */

1632
		if (c->x86 == 6 && c->x86_model < 0x1A && cfg->banks > 0)
1633
			mce_banks[0].init = 0;
1634 1635 1636 1637 1638 1639

		/*
		 * All newer Intel systems support MCE broadcasting. Enable
		 * synchronization with a one second timeout.
		 */
		if ((c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xe)) &&
1640 1641
			cfg->monarch_timeout < 0)
			cfg->monarch_timeout = USEC_PER_SEC;
1642

1643 1644 1645 1646
		/*
		 * There are also broken BIOSes on some Pentium M and
		 * earlier systems:
		 */
1647 1648
		if (c->x86 == 6 && c->x86_model <= 13 && cfg->bootlog < 0)
			cfg->bootlog = 0;
1649 1650 1651

		if (c->x86 == 6 && c->x86_model == 45)
			quirk_no_way_out = quirk_sandybridge_ifu;
1652
	}
1653 1654 1655
	if (cfg->monarch_timeout < 0)
		cfg->monarch_timeout = 0;
	if (cfg->bootlog != 0)
1656
		cfg->panic_timeout = 30;
1657 1658

	return 0;
1659
}
L
Linus Torvalds 已提交
1660

1661
static int __mcheck_cpu_ancient_init(struct cpuinfo_x86 *c)
1662 1663
{
	if (c->x86 != 5)
1664 1665
		return 0;

1666 1667
	switch (c->x86_vendor) {
	case X86_VENDOR_INTEL:
1668
		intel_p5_mcheck_init(c);
1669
		return 1;
1670 1671 1672
		break;
	case X86_VENDOR_CENTAUR:
		winchip_mcheck_init(c);
1673
		return 1;
1674 1675
		break;
	}
1676 1677

	return 0;
1678 1679
}

1680
static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
L
Linus Torvalds 已提交
1681 1682 1683 1684
{
	switch (c->x86_vendor) {
	case X86_VENDOR_INTEL:
		mce_intel_feature_init(c);
C
Chen Gong 已提交
1685
		mce_adjust_timer = mce_intel_adjust_timer;
L
Linus Torvalds 已提交
1686
		break;
1687 1688 1689
	case X86_VENDOR_AMD:
		mce_amd_feature_init(c);
		break;
L
Linus Torvalds 已提交
1690 1691 1692 1693 1694
	default:
		break;
	}
}

T
Thomas Gleixner 已提交
1695
static void mce_start_timer(unsigned int cpu, struct timer_list *t)
1696
{
1697
	unsigned long iv = check_interval * HZ;
1698

1699
	if (mca_cfg.ignore_ce || !iv)
1700 1701
		return;

1702 1703
	per_cpu(mce_next_interval, cpu) = iv;

T
Thomas Gleixner 已提交
1704
	t->expires = round_jiffies(jiffies + iv);
1705
	add_timer_on(t, cpu);
1706 1707
}

T
Thomas Gleixner 已提交
1708 1709
static void __mcheck_cpu_init_timer(void)
{
1710
	struct timer_list *t = this_cpu_ptr(&mce_timer);
T
Thomas Gleixner 已提交
1711 1712 1713 1714 1715 1716
	unsigned int cpu = smp_processor_id();

	setup_timer(t, mce_timer_fn, cpu);
	mce_start_timer(cpu, t);
}

A
Andi Kleen 已提交
1717 1718 1719
/* Handle unconfigured int18 (should never happen) */
static void unexpected_machine_check(struct pt_regs *regs, long error_code)
{
1720
	pr_err("CPU#%d: Unexpected int18 (Machine Check)\n",
A
Andi Kleen 已提交
1721 1722 1723 1724 1725 1726 1727
	       smp_processor_id());
}

/* Call the installed machine check handler for this CPU setup. */
void (*machine_check_vector)(struct pt_regs *, long error_code) =
						unexpected_machine_check;

1728
/*
L
Linus Torvalds 已提交
1729
 * Called for each booted CPU to set up machine checks.
I
Ingo Molnar 已提交
1730
 * Must be called with preempt off:
L
Linus Torvalds 已提交
1731
 */
1732
void mcheck_cpu_init(struct cpuinfo_x86 *c)
L
Linus Torvalds 已提交
1733
{
1734
	if (mca_cfg.disabled)
1735 1736
		return;

1737 1738
	if (__mcheck_cpu_ancient_init(c))
		return;
1739

1740
	if (!mce_available(c))
L
Linus Torvalds 已提交
1741 1742
		return;

1743
	if (__mcheck_cpu_cap_init() < 0 || __mcheck_cpu_apply_quirks(c) < 0) {
1744
		mca_cfg.disabled = true;
1745 1746 1747
		return;
	}

1748 1749
	machine_check_vector = do_machine_check;

1750 1751 1752
	__mcheck_cpu_init_generic();
	__mcheck_cpu_init_vendor(c);
	__mcheck_cpu_init_timer();
1753 1754
	INIT_WORK(this_cpu_ptr(&mce_work), mce_process_work);
	init_irq_work(this_cpu_ptr(&mce_irq_work), &mce_irq_work_cb);
L
Linus Torvalds 已提交
1755 1756 1757
}

/*
1758
 * mce_chrdev: Character device /dev/mcelog to read and clear the MCE log.
L
Linus Torvalds 已提交
1759 1760
 */

1761 1762 1763
static DEFINE_SPINLOCK(mce_chrdev_state_lock);
static int mce_chrdev_open_count;	/* #times opened */
static int mce_chrdev_open_exclu;	/* already open exclusive? */
T
Tim Hockin 已提交
1764

1765
static int mce_chrdev_open(struct inode *inode, struct file *file)
T
Tim Hockin 已提交
1766
{
1767
	spin_lock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1768

1769 1770 1771
	if (mce_chrdev_open_exclu ||
	    (mce_chrdev_open_count && (file->f_flags & O_EXCL))) {
		spin_unlock(&mce_chrdev_state_lock);
I
Ingo Molnar 已提交
1772

T
Tim Hockin 已提交
1773 1774 1775 1776
		return -EBUSY;
	}

	if (file->f_flags & O_EXCL)
1777 1778
		mce_chrdev_open_exclu = 1;
	mce_chrdev_open_count++;
T
Tim Hockin 已提交
1779

1780
	spin_unlock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1781

1782
	return nonseekable_open(inode, file);
T
Tim Hockin 已提交
1783 1784
}

1785
static int mce_chrdev_release(struct inode *inode, struct file *file)
T
Tim Hockin 已提交
1786
{
1787
	spin_lock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1788

1789 1790
	mce_chrdev_open_count--;
	mce_chrdev_open_exclu = 0;
T
Tim Hockin 已提交
1791

1792
	spin_unlock(&mce_chrdev_state_lock);
T
Tim Hockin 已提交
1793 1794 1795 1796

	return 0;
}

1797 1798
static void collect_tscs(void *data)
{
L
Linus Torvalds 已提交
1799
	unsigned long *cpu_tsc = (unsigned long *)data;
1800

L
Linus Torvalds 已提交
1801
	rdtscll(cpu_tsc[smp_processor_id()]);
1802
}
L
Linus Torvalds 已提交
1803

1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819
static int mce_apei_read_done;

/* Collect MCE record of previous boot in persistent storage via APEI ERST. */
static int __mce_read_apei(char __user **ubuf, size_t usize)
{
	int rc;
	u64 record_id;
	struct mce m;

	if (usize < sizeof(struct mce))
		return -EINVAL;

	rc = apei_read_mce(&m, &record_id);
	/* Error or no more MCE record */
	if (rc <= 0) {
		mce_apei_read_done = 1;
1820 1821 1822 1823 1824 1825
		/*
		 * When ERST is disabled, mce_chrdev_read() should return
		 * "no record" instead of "no device."
		 */
		if (rc == -ENODEV)
			return 0;
1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846
		return rc;
	}
	rc = -EFAULT;
	if (copy_to_user(*ubuf, &m, sizeof(struct mce)))
		return rc;
	/*
	 * In fact, we should have cleared the record after that has
	 * been flushed to the disk or sent to network in
	 * /sbin/mcelog, but we have no interface to support that now,
	 * so just clear it to avoid duplication.
	 */
	rc = apei_clear_mce(record_id);
	if (rc) {
		mce_apei_read_done = 1;
		return rc;
	}
	*ubuf += sizeof(struct mce);

	return 0;
}

1847 1848
static ssize_t mce_chrdev_read(struct file *filp, char __user *ubuf,
				size_t usize, loff_t *off)
L
Linus Torvalds 已提交
1849
{
I
Ingo Molnar 已提交
1850
	char __user *buf = ubuf;
1851
	unsigned long *cpu_tsc;
1852
	unsigned prev, next;
L
Linus Torvalds 已提交
1853 1854
	int i, err;

1855
	cpu_tsc = kmalloc(nr_cpu_ids * sizeof(long), GFP_KERNEL);
1856 1857 1858
	if (!cpu_tsc)
		return -ENOMEM;

1859
	mutex_lock(&mce_chrdev_read_mutex);
1860 1861 1862 1863 1864 1865 1866

	if (!mce_apei_read_done) {
		err = __mce_read_apei(&buf, usize);
		if (err || buf != ubuf)
			goto out;
	}

1867
	next = rcu_dereference_check_mce(mcelog.next);
L
Linus Torvalds 已提交
1868 1869

	/* Only supports full reads right now */
1870 1871 1872
	err = -EINVAL;
	if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce))
		goto out;
L
Linus Torvalds 已提交
1873 1874

	err = 0;
1875 1876 1877 1878
	prev = 0;
	do {
		for (i = prev; i < next; i++) {
			unsigned long start = jiffies;
H
Hidetoshi Seto 已提交
1879
			struct mce *m = &mcelog.entry[i];
1880

H
Hidetoshi Seto 已提交
1881
			while (!m->finished) {
1882
				if (time_after_eq(jiffies, start + 2)) {
H
Hidetoshi Seto 已提交
1883
					memset(m, 0, sizeof(*m));
1884 1885 1886
					goto timeout;
				}
				cpu_relax();
1887
			}
1888
			smp_rmb();
H
Hidetoshi Seto 已提交
1889 1890
			err |= copy_to_user(buf, m, sizeof(*m));
			buf += sizeof(*m);
1891 1892
timeout:
			;
1893
		}
L
Linus Torvalds 已提交
1894

1895 1896 1897 1898 1899
		memset(mcelog.entry + prev, 0,
		       (next - prev) * sizeof(struct mce));
		prev = next;
		next = cmpxchg(&mcelog.next, prev, 0);
	} while (next != prev);
L
Linus Torvalds 已提交
1900

1901
	synchronize_sched();
L
Linus Torvalds 已提交
1902

1903 1904 1905 1906
	/*
	 * Collect entries that were still getting written before the
	 * synchronize.
	 */
1907
	on_each_cpu(collect_tscs, cpu_tsc, 1);
I
Ingo Molnar 已提交
1908

1909
	for (i = next; i < MCE_LOG_LEN; i++) {
H
Hidetoshi Seto 已提交
1910 1911 1912 1913
		struct mce *m = &mcelog.entry[i];

		if (m->finished && m->tsc < cpu_tsc[m->cpu]) {
			err |= copy_to_user(buf, m, sizeof(*m));
L
Linus Torvalds 已提交
1914
			smp_rmb();
H
Hidetoshi Seto 已提交
1915 1916
			buf += sizeof(*m);
			memset(m, 0, sizeof(*m));
L
Linus Torvalds 已提交
1917
		}
1918
	}
1919 1920 1921 1922 1923

	if (err)
		err = -EFAULT;

out:
1924
	mutex_unlock(&mce_chrdev_read_mutex);
1925
	kfree(cpu_tsc);
I
Ingo Molnar 已提交
1926

1927
	return err ? err : buf - ubuf;
L
Linus Torvalds 已提交
1928 1929
}

1930
static unsigned int mce_chrdev_poll(struct file *file, poll_table *wait)
1931
{
1932
	poll_wait(file, &mce_chrdev_wait, wait);
1933
	if (rcu_access_index(mcelog.next))
1934
		return POLLIN | POLLRDNORM;
1935 1936
	if (!mce_apei_read_done && apei_check_mce())
		return POLLIN | POLLRDNORM;
1937 1938 1939
	return 0;
}

1940 1941
static long mce_chrdev_ioctl(struct file *f, unsigned int cmd,
				unsigned long arg)
L
Linus Torvalds 已提交
1942 1943
{
	int __user *p = (int __user *)arg;
1944

L
Linus Torvalds 已提交
1945
	if (!capable(CAP_SYS_ADMIN))
1946
		return -EPERM;
I
Ingo Molnar 已提交
1947

L
Linus Torvalds 已提交
1948
	switch (cmd) {
1949
	case MCE_GET_RECORD_LEN:
L
Linus Torvalds 已提交
1950 1951
		return put_user(sizeof(struct mce), p);
	case MCE_GET_LOG_LEN:
1952
		return put_user(MCE_LOG_LEN, p);
L
Linus Torvalds 已提交
1953 1954
	case MCE_GETCLEAR_FLAGS: {
		unsigned flags;
1955 1956

		do {
L
Linus Torvalds 已提交
1957
			flags = mcelog.flags;
1958
		} while (cmpxchg(&mcelog.flags, flags, 0) != flags);
I
Ingo Molnar 已提交
1959

1960
		return put_user(flags, p);
L
Linus Torvalds 已提交
1961 1962
	}
	default:
1963 1964
		return -ENOTTY;
	}
L
Linus Torvalds 已提交
1965 1966
}

1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987
static ssize_t (*mce_write)(struct file *filp, const char __user *ubuf,
			    size_t usize, loff_t *off);

void register_mce_write_callback(ssize_t (*fn)(struct file *filp,
			     const char __user *ubuf,
			     size_t usize, loff_t *off))
{
	mce_write = fn;
}
EXPORT_SYMBOL_GPL(register_mce_write_callback);

ssize_t mce_chrdev_write(struct file *filp, const char __user *ubuf,
			 size_t usize, loff_t *off)
{
	if (mce_write)
		return mce_write(filp, ubuf, usize, off);
	else
		return -EINVAL;
}

static const struct file_operations mce_chrdev_ops = {
1988 1989 1990
	.open			= mce_chrdev_open,
	.release		= mce_chrdev_release,
	.read			= mce_chrdev_read,
1991
	.write			= mce_chrdev_write,
1992 1993 1994
	.poll			= mce_chrdev_poll,
	.unlocked_ioctl		= mce_chrdev_ioctl,
	.llseek			= no_llseek,
L
Linus Torvalds 已提交
1995 1996
};

1997
static struct miscdevice mce_chrdev_device = {
L
Linus Torvalds 已提交
1998 1999 2000 2001 2002
	MISC_MCELOG_MINOR,
	"mcelog",
	&mce_chrdev_ops,
};

2003 2004 2005
static void __mce_disable_bank(void *arg)
{
	int bank = *((int *)arg);
2006
	__clear_bit(bank, this_cpu_ptr(mce_poll_banks));
2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021
	cmci_disable_bank(bank);
}

void mce_disable_bank(int bank)
{
	if (bank >= mca_cfg.banks) {
		pr_warn(FW_BUG
			"Ignoring request to disable invalid MCA bank %d.\n",
			bank);
		return;
	}
	set_bit(bank, mce_banks_ce_disabled);
	on_each_cpu(__mce_disable_bank, &bank, 1);
}

H
Hidetoshi Seto 已提交
2022
/*
2023 2024 2025 2026
 * mce=off Disables machine check
 * mce=no_cmci Disables CMCI
 * mce=dont_log_ce Clears corrected events silently, no log created for CEs.
 * mce=ignore_ce Disables polling and CMCI, corrected events are not cleared.
2027 2028 2029
 * mce=TOLERANCELEVEL[,monarchtimeout] (number, see above)
 *	monarchtimeout is how long to wait for other CPUs on machine
 *	check, or 0 to not wait
H
Hidetoshi Seto 已提交
2030 2031
 * mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
 * mce=nobootlog Don't log MCEs from before booting.
2032
 * mce=bios_cmci_threshold Don't program the CMCI threshold
H
Hidetoshi Seto 已提交
2033
 */
L
Linus Torvalds 已提交
2034 2035
static int __init mcheck_enable(char *str)
{
2036 2037
	struct mca_config *cfg = &mca_cfg;

2038
	if (*str == 0) {
2039
		enable_p5_mce();
2040 2041
		return 1;
	}
2042 2043
	if (*str == '=')
		str++;
L
Linus Torvalds 已提交
2044
	if (!strcmp(str, "off"))
2045
		cfg->disabled = true;
2046
	else if (!strcmp(str, "no_cmci"))
2047
		cfg->cmci_disabled = true;
2048
	else if (!strcmp(str, "dont_log_ce"))
2049
		cfg->dont_log_ce = true;
2050
	else if (!strcmp(str, "ignore_ce"))
2051
		cfg->ignore_ce = true;
H
Hidetoshi Seto 已提交
2052
	else if (!strcmp(str, "bootlog") || !strcmp(str, "nobootlog"))
2053
		cfg->bootlog = (str[0] == 'b');
2054
	else if (!strcmp(str, "bios_cmci_threshold"))
2055
		cfg->bios_cmci_threshold = true;
2056
	else if (isdigit(str[0])) {
2057
		get_option(&str, &(cfg->tolerant));
2058 2059
		if (*str == ',') {
			++str;
2060
			get_option(&str, &(cfg->monarch_timeout));
2061 2062
		}
	} else {
2063
		pr_info("mce argument %s ignored. Please use /sys\n", str);
H
Hidetoshi Seto 已提交
2064 2065
		return 0;
	}
2066
	return 1;
L
Linus Torvalds 已提交
2067
}
2068
__setup("mce", mcheck_enable);
L
Linus Torvalds 已提交
2069

2070
int __init mcheck_init(void)
2071
{
2072 2073
	mcheck_intel_therm_init();

2074 2075 2076
	return 0;
}

2077
/*
2078
 * mce_syscore: PM support
2079
 */
L
Linus Torvalds 已提交
2080

2081 2082 2083 2084
/*
 * Disable machine checks on suspend and shutdown. We can't really handle
 * them later.
 */
2085
static int mce_disable_error_reporting(void)
2086 2087 2088
{
	int i;

2089
	for (i = 0; i < mca_cfg.banks; i++) {
2090
		struct mce_bank *b = &mce_banks[i];
2091

2092
		if (b->init)
2093
			wrmsrl(MSR_IA32_MCx_CTL(i), 0);
2094
	}
2095 2096 2097
	return 0;
}

2098
static int mce_syscore_suspend(void)
2099
{
2100
	return mce_disable_error_reporting();
2101 2102
}

2103
static void mce_syscore_shutdown(void)
2104
{
2105
	mce_disable_error_reporting();
2106 2107
}

I
Ingo Molnar 已提交
2108 2109 2110 2111 2112
/*
 * On resume clear all MCE state. Don't want to see leftovers from the BIOS.
 * Only one CPU is active at this time, the others get re-added later using
 * CPU hotplug:
 */
2113
static void mce_syscore_resume(void)
L
Linus Torvalds 已提交
2114
{
2115
	__mcheck_cpu_init_generic();
2116
	__mcheck_cpu_init_vendor(raw_cpu_ptr(&cpu_info));
L
Linus Torvalds 已提交
2117 2118
}

2119
static struct syscore_ops mce_syscore_ops = {
2120 2121 2122
	.suspend	= mce_syscore_suspend,
	.shutdown	= mce_syscore_shutdown,
	.resume		= mce_syscore_resume,
2123 2124
};

2125
/*
2126
 * mce_device: Sysfs support
2127 2128
 */

2129 2130
static void mce_cpu_restart(void *data)
{
2131
	if (!mce_available(raw_cpu_ptr(&cpu_info)))
2132
		return;
2133 2134
	__mcheck_cpu_init_generic();
	__mcheck_cpu_init_timer();
2135 2136
}

L
Linus Torvalds 已提交
2137
/* Reinit MCEs after user configuration changes */
2138 2139
static void mce_restart(void)
{
2140
	mce_timer_delete_all();
2141
	on_each_cpu(mce_cpu_restart, NULL, 1);
L
Linus Torvalds 已提交
2142 2143
}

2144
/* Toggle features for corrected errors */
2145
static void mce_disable_cmci(void *data)
2146
{
2147
	if (!mce_available(raw_cpu_ptr(&cpu_info)))
2148 2149 2150 2151 2152 2153
		return;
	cmci_clear();
}

static void mce_enable_ce(void *all)
{
2154
	if (!mce_available(raw_cpu_ptr(&cpu_info)))
2155 2156 2157 2158
		return;
	cmci_reenable();
	cmci_recheck();
	if (all)
2159
		__mcheck_cpu_init_timer();
2160 2161
}

2162
static struct bus_type mce_subsys = {
I
Ingo Molnar 已提交
2163
	.name		= "machinecheck",
2164
	.dev_name	= "machinecheck",
L
Linus Torvalds 已提交
2165 2166
};

2167
DEFINE_PER_CPU(struct device *, mce_device);
I
Ingo Molnar 已提交
2168 2169

void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
L
Linus Torvalds 已提交
2170

2171
static inline struct mce_bank *attr_to_bank(struct device_attribute *attr)
2172 2173 2174
{
	return container_of(attr, struct mce_bank, attr);
}
2175

2176
static ssize_t show_bank(struct device *s, struct device_attribute *attr,
2177 2178
			 char *buf)
{
2179
	return sprintf(buf, "%llx\n", attr_to_bank(attr)->ctl);
2180 2181
}

2182
static ssize_t set_bank(struct device *s, struct device_attribute *attr,
H
Hidetoshi Seto 已提交
2183
			const char *buf, size_t size)
2184
{
H
Hidetoshi Seto 已提交
2185
	u64 new;
I
Ingo Molnar 已提交
2186

2187
	if (kstrtou64(buf, 0, &new) < 0)
2188
		return -EINVAL;
I
Ingo Molnar 已提交
2189

2190
	attr_to_bank(attr)->ctl = new;
2191
	mce_restart();
I
Ingo Molnar 已提交
2192

H
Hidetoshi Seto 已提交
2193
	return size;
2194
}
2195

I
Ingo Molnar 已提交
2196
static ssize_t
2197
show_trigger(struct device *s, struct device_attribute *attr, char *buf)
2198
{
2199
	strcpy(buf, mce_helper);
2200
	strcat(buf, "\n");
2201
	return strlen(mce_helper) + 1;
2202 2203
}

2204
static ssize_t set_trigger(struct device *s, struct device_attribute *attr,
I
Ingo Molnar 已提交
2205
				const char *buf, size_t siz)
2206 2207
{
	char *p;
I
Ingo Molnar 已提交
2208

2209 2210 2211
	strncpy(mce_helper, buf, sizeof(mce_helper));
	mce_helper[sizeof(mce_helper)-1] = 0;
	p = strchr(mce_helper, '\n');
I
Ingo Molnar 已提交
2212

2213
	if (p)
I
Ingo Molnar 已提交
2214 2215
		*p = 0;

2216
	return strlen(mce_helper) + !!p;
2217 2218
}

2219 2220
static ssize_t set_ignore_ce(struct device *s,
			     struct device_attribute *attr,
2221 2222 2223 2224
			     const char *buf, size_t size)
{
	u64 new;

2225
	if (kstrtou64(buf, 0, &new) < 0)
2226 2227
		return -EINVAL;

2228
	if (mca_cfg.ignore_ce ^ !!new) {
2229 2230
		if (new) {
			/* disable ce features */
2231 2232
			mce_timer_delete_all();
			on_each_cpu(mce_disable_cmci, NULL, 1);
2233
			mca_cfg.ignore_ce = true;
2234 2235
		} else {
			/* enable ce features */
2236
			mca_cfg.ignore_ce = false;
2237 2238 2239 2240 2241 2242
			on_each_cpu(mce_enable_ce, (void *)1, 1);
		}
	}
	return size;
}

2243 2244
static ssize_t set_cmci_disabled(struct device *s,
				 struct device_attribute *attr,
2245 2246 2247 2248
				 const char *buf, size_t size)
{
	u64 new;

2249
	if (kstrtou64(buf, 0, &new) < 0)
2250 2251
		return -EINVAL;

2252
	if (mca_cfg.cmci_disabled ^ !!new) {
2253 2254
		if (new) {
			/* disable cmci */
2255
			on_each_cpu(mce_disable_cmci, NULL, 1);
2256
			mca_cfg.cmci_disabled = true;
2257 2258
		} else {
			/* enable cmci */
2259
			mca_cfg.cmci_disabled = false;
2260 2261 2262 2263 2264 2265
			on_each_cpu(mce_enable_ce, NULL, 1);
		}
	}
	return size;
}

2266 2267
static ssize_t store_int_with_restart(struct device *s,
				      struct device_attribute *attr,
2268 2269
				      const char *buf, size_t size)
{
2270
	ssize_t ret = device_store_int(s, attr, buf, size);
2271 2272 2273 2274
	mce_restart();
	return ret;
}

2275
static DEVICE_ATTR(trigger, 0644, show_trigger, set_trigger);
2276
static DEVICE_INT_ATTR(tolerant, 0644, mca_cfg.tolerant);
2277
static DEVICE_INT_ATTR(monarch_timeout, 0644, mca_cfg.monarch_timeout);
2278
static DEVICE_BOOL_ATTR(dont_log_ce, 0644, mca_cfg.dont_log_ce);
I
Ingo Molnar 已提交
2279

2280 2281
static struct dev_ext_attribute dev_attr_check_interval = {
	__ATTR(check_interval, 0644, device_show_int, store_int_with_restart),
2282 2283
	&check_interval
};
I
Ingo Molnar 已提交
2284

2285
static struct dev_ext_attribute dev_attr_ignore_ce = {
2286 2287
	__ATTR(ignore_ce, 0644, device_show_bool, set_ignore_ce),
	&mca_cfg.ignore_ce
2288 2289
};

2290
static struct dev_ext_attribute dev_attr_cmci_disabled = {
2291 2292
	__ATTR(cmci_disabled, 0644, device_show_bool, set_cmci_disabled),
	&mca_cfg.cmci_disabled
2293 2294
};

2295 2296 2297 2298 2299 2300 2301 2302
static struct device_attribute *mce_device_attrs[] = {
	&dev_attr_tolerant.attr,
	&dev_attr_check_interval.attr,
	&dev_attr_trigger,
	&dev_attr_monarch_timeout.attr,
	&dev_attr_dont_log_ce.attr,
	&dev_attr_ignore_ce.attr,
	&dev_attr_cmci_disabled.attr,
2303 2304
	NULL
};
L
Linus Torvalds 已提交
2305

2306
static cpumask_var_t mce_device_initialized;
2307

2308 2309 2310 2311 2312
static void mce_device_release(struct device *dev)
{
	kfree(dev);
}

2313
/* Per cpu device init. All of the cpus still share the same ctrl bank: */
2314
static int mce_device_create(unsigned int cpu)
L
Linus Torvalds 已提交
2315
{
2316
	struct device *dev;
L
Linus Torvalds 已提交
2317
	int err;
2318
	int i, j;
2319

A
Andreas Herrmann 已提交
2320
	if (!mce_available(&boot_cpu_data))
2321 2322
		return -EIO;

2323 2324 2325
	dev = kzalloc(sizeof *dev, GFP_KERNEL);
	if (!dev)
		return -ENOMEM;
2326 2327
	dev->id  = cpu;
	dev->bus = &mce_subsys;
2328
	dev->release = &mce_device_release;
2329

2330
	err = device_register(dev);
2331 2332
	if (err) {
		put_device(dev);
2333
		return err;
2334
	}
2335

2336 2337
	for (i = 0; mce_device_attrs[i]; i++) {
		err = device_create_file(dev, mce_device_attrs[i]);
2338 2339 2340
		if (err)
			goto error;
	}
2341
	for (j = 0; j < mca_cfg.banks; j++) {
2342
		err = device_create_file(dev, &mce_banks[j].attr);
2343 2344 2345
		if (err)
			goto error2;
	}
2346
	cpumask_set_cpu(cpu, mce_device_initialized);
2347
	per_cpu(mce_device, cpu) = dev;
2348

2349
	return 0;
2350
error2:
2351
	while (--j >= 0)
2352
		device_remove_file(dev, &mce_banks[j].attr);
2353
error:
I
Ingo Molnar 已提交
2354
	while (--i >= 0)
2355
		device_remove_file(dev, mce_device_attrs[i]);
I
Ingo Molnar 已提交
2356

2357
	device_unregister(dev);
2358

2359 2360 2361
	return err;
}

2362
static void mce_device_remove(unsigned int cpu)
2363
{
2364
	struct device *dev = per_cpu(mce_device, cpu);
2365 2366
	int i;

2367
	if (!cpumask_test_cpu(cpu, mce_device_initialized))
2368 2369
		return;

2370 2371
	for (i = 0; mce_device_attrs[i]; i++)
		device_remove_file(dev, mce_device_attrs[i]);
I
Ingo Molnar 已提交
2372

2373
	for (i = 0; i < mca_cfg.banks; i++)
2374
		device_remove_file(dev, &mce_banks[i].attr);
I
Ingo Molnar 已提交
2375

2376 2377
	device_unregister(dev);
	cpumask_clear_cpu(cpu, mce_device_initialized);
2378
	per_cpu(mce_device, cpu) = NULL;
2379 2380
}

2381
/* Make sure there are no machine checks on offlined CPUs. */
2382
static void mce_disable_cpu(void *h)
2383
{
A
Andi Kleen 已提交
2384
	unsigned long action = *(unsigned long *)h;
I
Ingo Molnar 已提交
2385
	int i;
2386

2387
	if (!mce_available(raw_cpu_ptr(&cpu_info)))
2388
		return;
2389

A
Andi Kleen 已提交
2390 2391
	if (!(action & CPU_TASKS_FROZEN))
		cmci_clear();
2392
	for (i = 0; i < mca_cfg.banks; i++) {
2393
		struct mce_bank *b = &mce_banks[i];
2394

2395
		if (b->init)
2396
			wrmsrl(MSR_IA32_MCx_CTL(i), 0);
2397
	}
2398 2399
}

2400
static void mce_reenable_cpu(void *h)
2401
{
A
Andi Kleen 已提交
2402
	unsigned long action = *(unsigned long *)h;
I
Ingo Molnar 已提交
2403
	int i;
2404

2405
	if (!mce_available(raw_cpu_ptr(&cpu_info)))
2406
		return;
I
Ingo Molnar 已提交
2407

A
Andi Kleen 已提交
2408 2409
	if (!(action & CPU_TASKS_FROZEN))
		cmci_reenable();
2410
	for (i = 0; i < mca_cfg.banks; i++) {
2411
		struct mce_bank *b = &mce_banks[i];
2412

2413
		if (b->init)
2414
			wrmsrl(MSR_IA32_MCx_CTL(i), b->ctl);
2415
	}
2416 2417
}

2418
/* Get notified when a cpu comes on/off. Be hotplug friendly. */
2419
static int
I
Ingo Molnar 已提交
2420
mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
2421 2422
{
	unsigned int cpu = (unsigned long)hcpu;
2423
	struct timer_list *t = &per_cpu(mce_timer, cpu);
2424

2425
	switch (action & ~CPU_TASKS_FROZEN) {
2426
	case CPU_ONLINE:
2427
		mce_device_create(cpu);
2428 2429
		if (threshold_cpu_callback)
			threshold_cpu_callback(action, cpu);
2430 2431
		break;
	case CPU_DEAD:
2432 2433
		if (threshold_cpu_callback)
			threshold_cpu_callback(action, cpu);
2434
		mce_device_remove(cpu);
C
Chen Gong 已提交
2435
		mce_intel_hcpu_update(cpu);
B
Borislav Petkov 已提交
2436 2437 2438 2439

		/* intentionally ignoring frozen here */
		if (!(action & CPU_TASKS_FROZEN))
			cmci_rediscover();
2440
		break;
2441
	case CPU_DOWN_PREPARE:
A
Andi Kleen 已提交
2442
		smp_call_function_single(cpu, mce_disable_cpu, &action, 1);
C
Chen Gong 已提交
2443
		del_timer_sync(t);
2444 2445
		break;
	case CPU_DOWN_FAILED:
A
Andi Kleen 已提交
2446
		smp_call_function_single(cpu, mce_reenable_cpu, &action, 1);
T
Thomas Gleixner 已提交
2447
		mce_start_timer(cpu, t);
A
Andi Kleen 已提交
2448
		break;
2449 2450
	}

2451
	return NOTIFY_OK;
2452 2453
}

2454
static struct notifier_block mce_cpu_notifier = {
2455 2456 2457
	.notifier_call = mce_cpu_callback,
};

2458
static __init void mce_init_banks(void)
2459 2460 2461
{
	int i;

2462
	for (i = 0; i < mca_cfg.banks; i++) {
2463
		struct mce_bank *b = &mce_banks[i];
2464
		struct device_attribute *a = &b->attr;
I
Ingo Molnar 已提交
2465

2466
		sysfs_attr_init(&a->attr);
2467 2468
		a->attr.name	= b->attrname;
		snprintf(b->attrname, ATTR_LEN, "bank%d", i);
I
Ingo Molnar 已提交
2469 2470 2471 2472

		a->attr.mode	= 0644;
		a->show		= show_bank;
		a->store	= set_bank;
2473 2474 2475
	}
}

2476
static __init int mcheck_init_device(void)
2477 2478 2479 2480
{
	int err;
	int i = 0;

2481 2482 2483 2484
	if (!mce_available(&boot_cpu_data)) {
		err = -EIO;
		goto err_out;
	}
2485

2486 2487 2488 2489
	if (!zalloc_cpumask_var(&mce_device_initialized, GFP_KERNEL)) {
		err = -ENOMEM;
		goto err_out;
	}
2490

2491
	mce_init_banks();
2492

2493
	err = subsys_system_register(&mce_subsys, NULL);
2494
	if (err)
2495
		goto err_out_mem;
2496

2497
	cpu_notifier_register_begin();
2498
	for_each_online_cpu(i) {
2499
		err = mce_device_create(i);
2500
		if (err) {
2501 2502 2503 2504 2505 2506
			/*
			 * Register notifier anyway (and do not unreg it) so
			 * that we don't leave undeleted timers, see notifier
			 * callback above.
			 */
			__register_hotcpu_notifier(&mce_cpu_notifier);
2507
			cpu_notifier_register_done();
2508
			goto err_device_create;
2509
		}
2510 2511
	}

2512 2513
	__register_hotcpu_notifier(&mce_cpu_notifier);
	cpu_notifier_register_done();
2514

2515 2516
	register_syscore_ops(&mce_syscore_ops);

2517
	/* register character device /dev/mcelog */
2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538 2539 2540 2541
	err = misc_register(&mce_chrdev_device);
	if (err)
		goto err_register;

	return 0;

err_register:
	unregister_syscore_ops(&mce_syscore_ops);

err_device_create:
	/*
	 * We didn't keep track of which devices were created above, but
	 * even if we had, the set of online cpus might have changed.
	 * Play safe and remove for every possible cpu, since
	 * mce_device_remove() will do the right thing.
	 */
	for_each_possible_cpu(i)
		mce_device_remove(i);

err_out_mem:
	free_cpumask_var(mce_device_initialized);

err_out:
	pr_err("Unable to init device /dev/mcelog (rc: %d)\n", err);
I
Ingo Molnar 已提交
2542

L
Linus Torvalds 已提交
2543 2544
	return err;
}
2545
device_initcall_sync(mcheck_init_device);
I
Ingo Molnar 已提交
2546

2547 2548 2549 2550 2551
/*
 * Old style boot options parsing. Only for compatibility.
 */
static int __init mcheck_disable(char *str)
{
2552
	mca_cfg.disabled = true;
2553 2554 2555
	return 1;
}
__setup("nomce", mcheck_disable);
I
Ingo Molnar 已提交
2556

2557 2558
#ifdef CONFIG_DEBUG_FS
struct dentry *mce_get_debugfs_dir(void)
I
Ingo Molnar 已提交
2559
{
2560
	static struct dentry *dmce;
I
Ingo Molnar 已提交
2561

2562 2563
	if (!dmce)
		dmce = debugfs_create_dir("mce", NULL);
I
Ingo Molnar 已提交
2564

2565 2566
	return dmce;
}
I
Ingo Molnar 已提交
2567

2568 2569 2570 2571 2572 2573 2574 2575
static void mce_reset(void)
{
	cpu_missing = 0;
	atomic_set(&mce_fake_paniced, 0);
	atomic_set(&mce_executing, 0);
	atomic_set(&mce_callin, 0);
	atomic_set(&global_nwo, 0);
}
I
Ingo Molnar 已提交
2576

2577 2578 2579 2580
static int fake_panic_get(void *data, u64 *val)
{
	*val = fake_panic;
	return 0;
I
Ingo Molnar 已提交
2581 2582
}

2583
static int fake_panic_set(void *data, u64 val)
I
Ingo Molnar 已提交
2584
{
2585 2586 2587
	mce_reset();
	fake_panic = val;
	return 0;
I
Ingo Molnar 已提交
2588 2589
}

2590 2591
DEFINE_SIMPLE_ATTRIBUTE(fake_panic_fops, fake_panic_get,
			fake_panic_set, "%llu\n");
2592

2593
static int __init mcheck_debugfs_init(void)
2594
{
2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605
	struct dentry *dmce, *ffake_panic;

	dmce = mce_get_debugfs_dir();
	if (!dmce)
		return -ENOMEM;
	ffake_panic = debugfs_create_file("fake_panic", 0444, dmce, NULL,
					  &fake_panic_fops);
	if (!ffake_panic)
		return -ENOMEM;

	return 0;
2606
}
2607
late_initcall(mcheck_debugfs_init);
2608
#endif