i915_debugfs.c 48.9 KB
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/*
 * Copyright © 2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Eric Anholt <eric@anholt.net>
 *    Keith Packard <keithp@keithp.com>
 *
 */

#include <linux/seq_file.h>
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#include <linux/debugfs.h>
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#include <linux/slab.h>
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#include <linux/export.h>
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#include "drmP.h"
#include "drm.h"
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#include "intel_drv.h"
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#include "intel_ringbuffer.h"
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#include "i915_drm.h"
#include "i915_drv.h"

#define DRM_I915_RING_DEBUG 1


#if defined(CONFIG_DEBUG_FS)

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enum {
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	ACTIVE_LIST,
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	FLUSHING_LIST,
	INACTIVE_LIST,
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	PINNED_LIST,
	DEFERRED_FREE_LIST,
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};
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static const char *yesno(int v)
{
	return v ? "yes" : "no";
}

static int i915_capabilities(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	const struct intel_device_info *info = INTEL_INFO(dev);

	seq_printf(m, "gen: %d\n", info->gen);
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	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
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#define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
	B(is_mobile);
	B(is_i85x);
	B(is_i915g);
	B(is_i945gm);
	B(is_g33);
	B(need_gfx_hws);
	B(is_g4x);
	B(is_pineview);
	B(is_broadwater);
	B(is_crestline);
	B(has_fbc);
	B(has_pipe_cxsr);
	B(has_hotplug);
	B(cursor_needs_physical);
	B(has_overlay);
	B(overlay_needs_physical);
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	B(supports_tv);
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	B(has_bsd_ring);
	B(has_blt_ring);
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	B(has_llc);
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#undef B

	return 0;
}
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static const char *get_pin_flag(struct drm_i915_gem_object *obj)
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{
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	if (obj->user_pin_count > 0)
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		return "P";
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	else if (obj->pin_count > 0)
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		return "p";
	else
		return " ";
}

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static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
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{
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	switch (obj->tiling_mode) {
	default:
	case I915_TILING_NONE: return " ";
	case I915_TILING_X: return "X";
	case I915_TILING_Y: return "Y";
	}
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}

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static const char *cache_level_str(int type)
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{
	switch (type) {
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	case I915_CACHE_NONE: return " uncached";
	case I915_CACHE_LLC: return " snooped (LLC)";
	case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
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	default: return "";
	}
}

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static void
describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
{
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	seq_printf(m, "%p: %s%s %8zd %04x %04x %d %d%s%s%s",
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		   &obj->base,
		   get_pin_flag(obj),
		   get_tiling_flag(obj),
		   obj->base.size,
		   obj->base.read_domains,
		   obj->base.write_domain,
		   obj->last_rendering_seqno,
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		   obj->last_fenced_seqno,
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		   cache_level_str(obj->cache_level),
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		   obj->dirty ? " dirty" : "",
		   obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
	if (obj->base.name)
		seq_printf(m, " (name: %d)", obj->base.name);
	if (obj->fence_reg != I915_FENCE_REG_NONE)
		seq_printf(m, " (fence: %d)", obj->fence_reg);
	if (obj->gtt_space != NULL)
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		seq_printf(m, " (gtt offset: %08x, size: %08x)",
			   obj->gtt_offset, (unsigned int)obj->gtt_space->size);
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	if (obj->pin_mappable || obj->fault_mappable) {
		char s[3], *t = s;
		if (obj->pin_mappable)
			*t++ = 'p';
		if (obj->fault_mappable)
			*t++ = 'f';
		*t = '\0';
		seq_printf(m, " (%s mappable)", s);
	}
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	if (obj->ring != NULL)
		seq_printf(m, " (%s)", obj->ring->name);
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}

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static int i915_gem_object_list_info(struct seq_file *m, void *data)
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{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
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	uintptr_t list = (uintptr_t) node->info_ent->data;
	struct list_head *head;
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	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct drm_i915_gem_object *obj;
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	size_t total_obj_size, total_gtt_size;
	int count, ret;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	switch (list) {
	case ACTIVE_LIST:
		seq_printf(m, "Active:\n");
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		head = &dev_priv->mm.active_list;
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		break;
	case INACTIVE_LIST:
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		seq_printf(m, "Inactive:\n");
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		head = &dev_priv->mm.inactive_list;
		break;
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	case PINNED_LIST:
		seq_printf(m, "Pinned:\n");
		head = &dev_priv->mm.pinned_list;
		break;
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	case FLUSHING_LIST:
		seq_printf(m, "Flushing:\n");
		head = &dev_priv->mm.flushing_list;
		break;
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	case DEFERRED_FREE_LIST:
		seq_printf(m, "Deferred free:\n");
		head = &dev_priv->mm.deferred_free_list;
		break;
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	default:
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		mutex_unlock(&dev->struct_mutex);
		return -EINVAL;
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	}

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	total_obj_size = total_gtt_size = count = 0;
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	list_for_each_entry(obj, head, mm_list) {
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		seq_printf(m, "   ");
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		describe_obj(m, obj);
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		seq_printf(m, "\n");
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		total_obj_size += obj->base.size;
		total_gtt_size += obj->gtt_space->size;
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		count++;
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	}
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	mutex_unlock(&dev->struct_mutex);
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	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
		   count, total_obj_size, total_gtt_size);
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	return 0;
}

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#define count_objects(list, member) do { \
	list_for_each_entry(obj, list, member) { \
		size += obj->gtt_space->size; \
		++count; \
		if (obj->map_and_fenceable) { \
			mappable_size += obj->gtt_space->size; \
			++mappable_count; \
		} \
	} \
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} while (0)
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static int i915_gem_object_info(struct seq_file *m, void* data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
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	u32 count, mappable_count;
	size_t size, mappable_size;
	struct drm_i915_gem_object *obj;
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	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

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	seq_printf(m, "%u objects, %zu bytes\n",
		   dev_priv->mm.object_count,
		   dev_priv->mm.object_memory);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.gtt_list, gtt_list);
	seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.active_list, mm_list);
	count_objects(&dev_priv->mm.flushing_list, mm_list);
	seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.pinned_list, mm_list);
	seq_printf(m, "  %u [%u] pinned objects, %zu [%zu] bytes\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.inactive_list, mm_list);
	seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	count_objects(&dev_priv->mm.deferred_free_list, mm_list);
	seq_printf(m, "  %u [%u] freed objects, %zu [%zu] bytes\n",
		   count, mappable_count, size, mappable_size);

	size = count = mappable_size = mappable_count = 0;
	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
		if (obj->fault_mappable) {
			size += obj->gtt_space->size;
			++count;
		}
		if (obj->pin_mappable) {
			mappable_size += obj->gtt_space->size;
			++mappable_count;
		}
	}
	seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
		   mappable_count, mappable_size);
	seq_printf(m, "%u fault mappable objects, %zu bytes\n",
		   count, size);

	seq_printf(m, "%zu [%zu] gtt total\n",
		   dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
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	mutex_unlock(&dev->struct_mutex);

	return 0;
}

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static int i915_gem_gtt_info(struct seq_file *m, void* data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_object *obj;
	size_t total_obj_size, total_gtt_size;
	int count, ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	total_obj_size = total_gtt_size = count = 0;
	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
		seq_printf(m, "   ");
		describe_obj(m, obj);
		seq_printf(m, "\n");
		total_obj_size += obj->base.size;
		total_gtt_size += obj->gtt_space->size;
		count++;
	}

	mutex_unlock(&dev->struct_mutex);

	seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
		   count, total_obj_size, total_gtt_size);

	return 0;
}

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static int i915_gem_pageflip_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	unsigned long flags;
	struct intel_crtc *crtc;

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
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		const char pipe = pipe_name(crtc->pipe);
		const char plane = plane_name(crtc->plane);
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		struct intel_unpin_work *work;

		spin_lock_irqsave(&dev->event_lock, flags);
		work = crtc->unpin_work;
		if (work == NULL) {
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			seq_printf(m, "No flip due on pipe %c (plane %c)\n",
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				   pipe, plane);
		} else {
			if (!work->pending) {
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				seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
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					   pipe, plane);
			} else {
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				seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
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					   pipe, plane);
			}
			if (work->enable_stall_check)
				seq_printf(m, "Stall check enabled, ");
			else
				seq_printf(m, "Stall check waiting for page flip ioctl, ");
			seq_printf(m, "%d prepares\n", work->pending);

			if (work->old_fb_obj) {
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				struct drm_i915_gem_object *obj = work->old_fb_obj;
				if (obj)
					seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
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			}
			if (work->pending_flip_obj) {
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				struct drm_i915_gem_object *obj = work->pending_flip_obj;
				if (obj)
					seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
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			}
		}
		spin_unlock_irqrestore(&dev->event_lock, flags);
	}

	return 0;
}

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static int i915_gem_request_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct drm_i915_gem_request *gem_request;
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	int ret, count;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	count = 0;
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	if (!list_empty(&dev_priv->ring[RCS].request_list)) {
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		seq_printf(m, "Render requests:\n");
		list_for_each_entry(gem_request,
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				    &dev_priv->ring[RCS].request_list,
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				    list) {
			seq_printf(m, "    %d @ %d\n",
				   gem_request->seqno,
				   (int) (jiffies - gem_request->emitted_jiffies));
		}
		count++;
	}
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	if (!list_empty(&dev_priv->ring[VCS].request_list)) {
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		seq_printf(m, "BSD requests:\n");
		list_for_each_entry(gem_request,
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				    &dev_priv->ring[VCS].request_list,
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				    list) {
			seq_printf(m, "    %d @ %d\n",
				   gem_request->seqno,
				   (int) (jiffies - gem_request->emitted_jiffies));
		}
		count++;
	}
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	if (!list_empty(&dev_priv->ring[BCS].request_list)) {
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		seq_printf(m, "BLT requests:\n");
		list_for_each_entry(gem_request,
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				    &dev_priv->ring[BCS].request_list,
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				    list) {
			seq_printf(m, "    %d @ %d\n",
				   gem_request->seqno,
				   (int) (jiffies - gem_request->emitted_jiffies));
		}
		count++;
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	}
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	mutex_unlock(&dev->struct_mutex);

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	if (count == 0)
		seq_printf(m, "No requests\n");

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	return 0;
}

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static void i915_ring_seqno_info(struct seq_file *m,
				 struct intel_ring_buffer *ring)
{
	if (ring->get_seqno) {
		seq_printf(m, "Current sequence (%s): %d\n",
			   ring->name, ring->get_seqno(ring));
		seq_printf(m, "Waiter sequence (%s):  %d\n",
			   ring->name, ring->waiting_seqno);
		seq_printf(m, "IRQ sequence (%s):     %d\n",
			   ring->name, ring->irq_seqno);
	}
}

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static int i915_gem_seqno_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int ret, i;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	for (i = 0; i < I915_NUM_RINGS; i++)
		i915_ring_seqno_info(m, &dev_priv->ring[i]);
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	mutex_unlock(&dev->struct_mutex);

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	return 0;
}


static int i915_interrupt_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int ret, i, pipe;
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	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	if (!HAS_PCH_SPLIT(dev)) {
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		seq_printf(m, "Interrupt enable:    %08x\n",
			   I915_READ(IER));
		seq_printf(m, "Interrupt identity:  %08x\n",
			   I915_READ(IIR));
		seq_printf(m, "Interrupt mask:      %08x\n",
			   I915_READ(IMR));
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		for_each_pipe(pipe)
			seq_printf(m, "Pipe %c stat:         %08x\n",
				   pipe_name(pipe),
				   I915_READ(PIPESTAT(pipe)));
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	} else {
		seq_printf(m, "North Display Interrupt enable:		%08x\n",
			   I915_READ(DEIER));
		seq_printf(m, "North Display Interrupt identity:	%08x\n",
			   I915_READ(DEIIR));
		seq_printf(m, "North Display Interrupt mask:		%08x\n",
			   I915_READ(DEIMR));
		seq_printf(m, "South Display Interrupt enable:		%08x\n",
			   I915_READ(SDEIER));
		seq_printf(m, "South Display Interrupt identity:	%08x\n",
			   I915_READ(SDEIIR));
		seq_printf(m, "South Display Interrupt mask:		%08x\n",
			   I915_READ(SDEIMR));
		seq_printf(m, "Graphics Interrupt enable:		%08x\n",
			   I915_READ(GTIER));
		seq_printf(m, "Graphics Interrupt identity:		%08x\n",
			   I915_READ(GTIIR));
		seq_printf(m, "Graphics Interrupt mask:		%08x\n",
			   I915_READ(GTIMR));
	}
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	seq_printf(m, "Interrupts received: %d\n",
		   atomic_read(&dev_priv->irq_received));
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	for (i = 0; i < I915_NUM_RINGS; i++) {
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		if (IS_GEN6(dev) || IS_GEN7(dev)) {
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			seq_printf(m, "Graphics Interrupt mask (%s):	%08x\n",
				   dev_priv->ring[i].name,
				   I915_READ_IMR(&dev_priv->ring[i]));
		}
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		i915_ring_seqno_info(m, &dev_priv->ring[i]);
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	}
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	mutex_unlock(&dev->struct_mutex);

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	return 0;
}

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static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	int i, ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
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	seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
	seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
	for (i = 0; i < dev_priv->num_fence_regs; i++) {
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		struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
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		seq_printf(m, "Fenced object[%2d] = ", i);
		if (obj == NULL)
			seq_printf(m, "unused");
		else
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			describe_obj(m, obj);
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		seq_printf(m, "\n");
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	}

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	mutex_unlock(&dev->struct_mutex);
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	return 0;
}

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static int i915_hws_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
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	struct intel_ring_buffer *ring;
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	const volatile u32 __iomem *hws;
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	int i;

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	ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
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	hws = (volatile u32 __iomem *)ring->status_page.page_addr;
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	if (hws == NULL)
		return 0;

	for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
		seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
			   i * 4,
			   hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
	}
	return 0;
}

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static void i915_dump_object(struct seq_file *m,
			     struct io_mapping *mapping,
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			     struct drm_i915_gem_object *obj)
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{
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	int page, page_count, i;
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	page_count = obj->base.size / PAGE_SIZE;
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	for (page = 0; page < page_count; page++) {
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		u32 *mem = io_mapping_map_wc(mapping,
576
					     obj->gtt_offset + page * PAGE_SIZE);
577 578
		for (i = 0; i < PAGE_SIZE; i += 4)
			seq_printf(m, "%08x :  %08x\n", i, mem[i / 4]);
579
		io_mapping_unmap(mem);
580 581 582 583 584 585 586 587
	}
}

static int i915_batchbuffer_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
588
	struct drm_i915_gem_object *obj;
589 590
	int ret;

591 592 593
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
594

595 596 597 598
	list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
		if (obj->base.read_domains & I915_GEM_DOMAIN_COMMAND) {
		    seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset);
		    i915_dump_object(m, dev_priv->mm.gtt_mapping, obj);
599 600 601
		}
	}

602
	mutex_unlock(&dev->struct_mutex);
603 604 605 606 607 608 609 610
	return 0;
}

static int i915_ringbuffer_data(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
611
	struct intel_ring_buffer *ring;
612 613 614 615 616
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
617

618
	ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
619
	if (!ring->obj) {
620
		seq_printf(m, "No ringbuffer setup\n");
621
	} else {
C
Chris Wilson 已提交
622
		const u8 __iomem *virt = ring->virtual_start;
623
		uint32_t off;
624

625
		for (off = 0; off < ring->size; off += 4) {
626 627 628
			uint32_t *ptr = (uint32_t *)(virt + off);
			seq_printf(m, "%08x :  %08x\n", off, *ptr);
		}
629
	}
630
	mutex_unlock(&dev->struct_mutex);
631 632 633 634 635 636 637 638 639

	return 0;
}

static int i915_ringbuffer_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
640
	struct intel_ring_buffer *ring;
641
	int ret;
642

643
	ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
644
	if (ring->size == 0)
645
		return 0;
646

647 648 649 650
	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

651 652 653 654 655
	seq_printf(m, "Ring %s:\n", ring->name);
	seq_printf(m, "  Head :    %08x\n", I915_READ_HEAD(ring) & HEAD_ADDR);
	seq_printf(m, "  Tail :    %08x\n", I915_READ_TAIL(ring) & TAIL_ADDR);
	seq_printf(m, "  Size :    %08x\n", ring->size);
	seq_printf(m, "  Active :  %08x\n", intel_ring_get_active_head(ring));
656 657 658 659 660
	seq_printf(m, "  NOPID :   %08x\n", I915_READ_NOPID(ring));
	if (IS_GEN6(dev)) {
		seq_printf(m, "  Sync 0 :   %08x\n", I915_READ_SYNC_0(ring));
		seq_printf(m, "  Sync 1 :   %08x\n", I915_READ_SYNC_1(ring));
	}
661 662
	seq_printf(m, "  Control : %08x\n", I915_READ_CTL(ring));
	seq_printf(m, "  Start :   %08x\n", I915_READ_START(ring));
663

664 665
	mutex_unlock(&dev->struct_mutex);

666 667 668
	return 0;
}

669 670 671
static const char *ring_str(int ring)
{
	switch (ring) {
672 673 674
	case RCS: return "render";
	case VCS: return "bsd";
	case BCS: return "blt";
675 676 677 678
	default: return "";
	}
}

679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708
static const char *pin_flag(int pinned)
{
	if (pinned > 0)
		return " P";
	else if (pinned < 0)
		return " p";
	else
		return "";
}

static const char *tiling_flag(int tiling)
{
	switch (tiling) {
	default:
	case I915_TILING_NONE: return "";
	case I915_TILING_X: return " X";
	case I915_TILING_Y: return " Y";
	}
}

static const char *dirty_flag(int dirty)
{
	return dirty ? " dirty" : "";
}

static const char *purgeable_flag(int purgeable)
{
	return purgeable ? " purgeable" : "";
}

709 710 711 712 713 714 715 716
static void print_error_buffers(struct seq_file *m,
				const char *name,
				struct drm_i915_error_buffer *err,
				int count)
{
	seq_printf(m, "%s [%d]:\n", name, count);

	while (count--) {
717
		seq_printf(m, "  %08x %8u %04x %04x %08x%s%s%s%s%s%s%s",
718 719 720 721 722 723 724 725 726
			   err->gtt_offset,
			   err->size,
			   err->read_domains,
			   err->write_domain,
			   err->seqno,
			   pin_flag(err->pinned),
			   tiling_flag(err->tiling),
			   dirty_flag(err->dirty),
			   purgeable_flag(err->purgeable),
727
			   err->ring != -1 ? " " : "",
728
			   ring_str(err->ring),
729
			   cache_level_str(err->cache_level));
730 731 732 733 734 735 736 737 738 739 740

		if (err->name)
			seq_printf(m, " (name: %d)", err->name);
		if (err->fence_reg != I915_FENCE_REG_NONE)
			seq_printf(m, " (fence: %d)", err->fence_reg);

		seq_printf(m, "\n");
		err++;
	}
}

741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760
static void i915_ring_error_state(struct seq_file *m,
				  struct drm_device *dev,
				  struct drm_i915_error_state *error,
				  unsigned ring)
{
	seq_printf(m, "%s command stream:\n", ring_str(ring));
	seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
	seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
	seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
	seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
	if (ring == RCS) {
		if (INTEL_INFO(dev)->gen >= 4) {
			seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);
			seq_printf(m, "  INSTPS: 0x%08x\n", error->instps);
		}
		seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm);
	}
	seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
}

761 762 763 764 765 766 767
static int i915_error_state(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct drm_i915_error_state *error;
	unsigned long flags;
768
	int i, page, offset, elt;
769 770 771 772 773 774 775 776 777

	spin_lock_irqsave(&dev_priv->error_lock, flags);
	if (!dev_priv->first_error) {
		seq_printf(m, "no error state collected\n");
		goto out;
	}

	error = dev_priv->first_error;

778 779
	seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
		   error->time.tv_usec);
780
	seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
781 782
	seq_printf(m, "EIR: 0x%08x\n", error->eir);
	seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
783

784
	for (i = 0; i < dev_priv->num_fence_regs; i++)
785 786
		seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);

787 788 789 790 791 792 793 794 795
	if (INTEL_INFO(dev)->gen >= 6) 
		seq_printf(m, "ERROR: 0x%08x\n", error->error);

	i915_ring_error_state(m, dev, error, RCS);
	if (HAS_BLT(dev))
		i915_ring_error_state(m, dev, error, BCS);
	if (HAS_BSD(dev))
		i915_ring_error_state(m, dev, error, VCS);

796 797 798 799 800 801 802 803 804
	if (error->active_bo)
		print_error_buffers(m, "Active",
				    error->active_bo,
				    error->active_bo_count);

	if (error->pinned_bo)
		print_error_buffers(m, "Pinned",
				    error->pinned_bo,
				    error->pinned_bo_count);
805 806 807 808 809

	for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) {
		if (error->batchbuffer[i]) {
			struct drm_i915_error_object *obj = error->batchbuffer[i];

810 811 812
			seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
				   dev_priv->ring[i].name,
				   obj->gtt_offset);
813 814 815 816 817 818 819 820 821 822
			offset = 0;
			for (page = 0; page < obj->page_count; page++) {
				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
					seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
					offset += 4;
				}
			}
		}
	}

823 824 825 826 827 828 829 830 831 832 833 834 835 836
	for (i = 0; i < ARRAY_SIZE(error->ringbuffer); i++) {
		if (error->ringbuffer[i]) {
			struct drm_i915_error_object *obj = error->ringbuffer[i];
			seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
				   dev_priv->ring[i].name,
				   obj->gtt_offset);
			offset = 0;
			for (page = 0; page < obj->page_count; page++) {
				for (elt = 0; elt < PAGE_SIZE/4; elt++) {
					seq_printf(m, "%08x :  %08x\n",
						   offset,
						   obj->pages[page][elt]);
					offset += 4;
				}
837 838 839
			}
		}
	}
840

841 842 843
	if (error->overlay)
		intel_overlay_print_error_state(m, error->overlay);

844 845 846
	if (error->display)
		intel_display_print_error_state(m, dev, error->display);

847 848 849 850 851
out:
	spin_unlock_irqrestore(&dev_priv->error_lock, flags);

	return 0;
}
852

853 854 855 856 857
static int i915_rstdby_delays(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
858 859 860 861 862 863 864 865 866 867
	u16 crstanddelay;
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	crstanddelay = I915_READ16(CRSTANDVID);

	mutex_unlock(&dev->struct_mutex);
868 869 870 871 872 873 874 875 876 877 878

	seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));

	return 0;
}

static int i915_cur_delayinfo(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
879
	int ret;
880 881 882 883 884 885 886 887 888 889 890

	if (IS_GEN5(dev)) {
		u16 rgvswctl = I915_READ16(MEMSWCTL);
		u16 rgvstat = I915_READ16(MEMSTAT_ILK);

		seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
		seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
		seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
			   MEMSTAT_VID_SHIFT);
		seq_printf(m, "Current P-state: %d\n",
			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
891
	} else if (IS_GEN6(dev) || IS_GEN7(dev)) {
892 893 894
		u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
		u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
		u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
895 896 897
		u32 rpstat;
		u32 rpupei, rpcurup, rpprevup;
		u32 rpdownei, rpcurdown, rpprevdown;
898 899 900
		int max_freq;

		/* RPSTAT1 is in the GT power well */
901 902 903 904
		ret = mutex_lock_interruptible(&dev->struct_mutex);
		if (ret)
			return ret;

905
		gen6_gt_force_wake_get(dev_priv);
906

907 908 909 910 911 912 913 914
		rpstat = I915_READ(GEN6_RPSTAT1);
		rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
		rpcurup = I915_READ(GEN6_RP_CUR_UP);
		rpprevup = I915_READ(GEN6_RP_PREV_UP);
		rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
		rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
		rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);

915 916 917
		gen6_gt_force_wake_put(dev_priv);
		mutex_unlock(&dev->struct_mutex);

918
		seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
919
		seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
920 921 922 923 924 925
		seq_printf(m, "Render p-state ratio: %d\n",
			   (gt_perf_status & 0xff00) >> 8);
		seq_printf(m, "Render p-state VID: %d\n",
			   gt_perf_status & 0xff);
		seq_printf(m, "Render p-state limit: %d\n",
			   rp_state_limits & 0xff);
926
		seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
927
						GEN6_CAGF_SHIFT) * 50);
928 929 930 931 932 933 934 935 936 937 938 939
		seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
			   GEN6_CURICONT_MASK);
		seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
			   GEN6_CURBSYTAVG_MASK);
		seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
			   GEN6_CURBSYTAVG_MASK);
		seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
			   GEN6_CURIAVG_MASK);
		seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
			   GEN6_CURBSYTAVG_MASK);
		seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
			   GEN6_CURBSYTAVG_MASK);
940 941 942

		max_freq = (rp_state_cap & 0xff0000) >> 16;
		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
943
			   max_freq * 50);
944 945 946

		max_freq = (rp_state_cap & 0xff00) >> 8;
		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
947
			   max_freq * 50);
948 949 950

		max_freq = rp_state_cap & 0xff;
		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
951
			   max_freq * 50);
952 953 954
	} else {
		seq_printf(m, "no P-state info available\n");
	}
955 956 957 958 959 960 961 962 963 964

	return 0;
}

static int i915_delayfreq_table(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	u32 delayfreq;
965 966 967 968 969
	int ret, i;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
970 971 972

	for (i = 0; i < 16; i++) {
		delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
973 974
		seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
			   (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
975 976
	}

977 978
	mutex_unlock(&dev->struct_mutex);

979 980 981 982 983 984 985 986 987 988 989 990 991 992
	return 0;
}

static inline int MAP_TO_MV(int map)
{
	return 1250 - (map * 25);
}

static int i915_inttoext_table(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	u32 inttoext;
993 994 995 996 997
	int ret, i;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
998 999 1000 1001 1002 1003

	for (i = 1; i <= 32; i++) {
		inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
		seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
	}

1004 1005
	mutex_unlock(&dev->struct_mutex);

1006 1007 1008
	return 0;
}

1009
static int ironlake_drpc_info(struct seq_file *m)
1010 1011 1012 1013
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026
	u32 rgvmodectl, rstdbyctl;
	u16 crstandvid;
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	rgvmodectl = I915_READ(MEMMODECTL);
	rstdbyctl = I915_READ(RSTDBYCTL);
	crstandvid = I915_READ16(CRSTANDVID);

	mutex_unlock(&dev->struct_mutex);
1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040

	seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
		   "yes" : "no");
	seq_printf(m, "Boost freq: %d\n",
		   (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
		   MEMMODE_BOOST_FREQ_SHIFT);
	seq_printf(m, "HW control enabled: %s\n",
		   rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
	seq_printf(m, "SW control enabled: %s\n",
		   rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
	seq_printf(m, "Gated voltage change: %s\n",
		   rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
	seq_printf(m, "Starting frequency: P%d\n",
		   (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1041
	seq_printf(m, "Max P-state: P%d\n",
1042
		   (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1043 1044 1045 1046 1047
	seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
	seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
	seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
	seq_printf(m, "Render standby enabled: %s\n",
		   (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071
	seq_printf(m, "Current RS state: ");
	switch (rstdbyctl & RSX_STATUS_MASK) {
	case RSX_STATUS_ON:
		seq_printf(m, "on\n");
		break;
	case RSX_STATUS_RC1:
		seq_printf(m, "RC1\n");
		break;
	case RSX_STATUS_RC1E:
		seq_printf(m, "RC1E\n");
		break;
	case RSX_STATUS_RS1:
		seq_printf(m, "RS1\n");
		break;
	case RSX_STATUS_RS2:
		seq_printf(m, "RS2 (RC6)\n");
		break;
	case RSX_STATUS_RS3:
		seq_printf(m, "RC3 (RC6+)\n");
		break;
	default:
		seq_printf(m, "unknown\n");
		break;
	}
1072 1073 1074 1075

	return 0;
}

1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159
static int gen6_drpc_info(struct seq_file *m)
{

	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	u32 rpmodectl1, gt_core_status, rcctl1;
	int count=0, ret;


	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	if (atomic_read(&dev_priv->forcewake_count)) {
		seq_printf(m, "RC information inaccurate because userspace "
			      "holds a reference \n");
	} else {
		/* NB: we cannot use forcewake, else we read the wrong values */
		while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
			udelay(10);
		seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
	}

	gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
	trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);

	rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
	rcctl1 = I915_READ(GEN6_RC_CONTROL);
	mutex_unlock(&dev->struct_mutex);

	seq_printf(m, "Video Turbo Mode: %s\n",
		   yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
	seq_printf(m, "HW control enabled: %s\n",
		   yesno(rpmodectl1 & GEN6_RP_ENABLE));
	seq_printf(m, "SW control enabled: %s\n",
		   yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
			  GEN6_RP_MEDIA_SW_MODE));
	seq_printf(m, "RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
	seq_printf(m, "RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
	seq_printf(m, "Deep RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
	seq_printf(m, "Deepest RC6 Enabled: %s\n",
		   yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
	seq_printf(m, "Current RC state: ");
	switch (gt_core_status & GEN6_RCn_MASK) {
	case GEN6_RC0:
		if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
			seq_printf(m, "Core Power Down\n");
		else
			seq_printf(m, "on\n");
		break;
	case GEN6_RC3:
		seq_printf(m, "RC3\n");
		break;
	case GEN6_RC6:
		seq_printf(m, "RC6\n");
		break;
	case GEN6_RC7:
		seq_printf(m, "RC7\n");
		break;
	default:
		seq_printf(m, "Unknown\n");
		break;
	}

	seq_printf(m, "Core Power Down: %s\n",
		   yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
	return 0;
}

static int i915_drpc_info(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;

	if (IS_GEN6(dev) || IS_GEN7(dev))
		return gen6_drpc_info(m);
	else
		return ironlake_drpc_info(m);
}

1160 1161 1162 1163 1164 1165
static int i915_fbc_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;

1166
	if (!I915_HAS_FBC(dev)) {
1167 1168 1169 1170
		seq_printf(m, "FBC unsupported on this chipset\n");
		return 0;
	}

1171
	if (intel_fbc_enabled(dev)) {
1172 1173 1174 1175
		seq_printf(m, "FBC enabled\n");
	} else {
		seq_printf(m, "FBC disabled: ");
		switch (dev_priv->no_fbc_reason) {
C
Chris Wilson 已提交
1176 1177 1178
		case FBC_NO_OUTPUT:
			seq_printf(m, "no outputs");
			break;
1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193
		case FBC_STOLEN_TOO_SMALL:
			seq_printf(m, "not enough stolen memory");
			break;
		case FBC_UNSUPPORTED_MODE:
			seq_printf(m, "mode not supported");
			break;
		case FBC_MODE_TOO_LARGE:
			seq_printf(m, "mode too large");
			break;
		case FBC_BAD_PLANE:
			seq_printf(m, "FBC unsupported on plane");
			break;
		case FBC_NOT_TILED:
			seq_printf(m, "scanout buffer not tiled");
			break;
1194 1195 1196
		case FBC_MULTIPLE_PIPES:
			seq_printf(m, "multiple pipes are enabled");
			break;
1197 1198 1199
		case FBC_MODULE_PARAM:
			seq_printf(m, "disabled per module param (default off)");
			break;
1200 1201 1202 1203 1204 1205 1206 1207
		default:
			seq_printf(m, "unknown reason");
		}
		seq_printf(m, "\n");
	}
	return 0;
}

1208 1209 1210 1211 1212 1213 1214
static int i915_sr_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	bool sr_enabled = false;

1215
	if (HAS_PCH_SPLIT(dev))
1216
		sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1217
	else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1218 1219 1220 1221 1222 1223
		sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
	else if (IS_I915GM(dev))
		sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
	else if (IS_PINEVIEW(dev))
		sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;

1224 1225
	seq_printf(m, "self-refresh: %s\n",
		   sr_enabled ? "enabled" : "disabled");
1226 1227 1228 1229

	return 0;
}

1230 1231 1232 1233 1234 1235
static int i915_emon_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	unsigned long temp, chipset, gfx;
1236 1237 1238 1239 1240
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1241 1242 1243 1244

	temp = i915_mch_val(dev_priv);
	chipset = i915_chipset_val(dev_priv);
	gfx = i915_gfx_val(dev_priv);
1245
	mutex_unlock(&dev->struct_mutex);
1246 1247 1248 1249 1250 1251 1252 1253 1254

	seq_printf(m, "GMCH temp: %ld\n", temp);
	seq_printf(m, "Chipset power: %ld\n", chipset);
	seq_printf(m, "GFX power: %ld\n", gfx);
	seq_printf(m, "Total power: %ld\n", chipset + gfx);

	return 0;
}

1255 1256 1257 1258 1259 1260 1261 1262
static int i915_ring_freq_table(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret;
	int gpu_freq, ia_freq;

1263
	if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292
		seq_printf(m, "unsupported on this chipset\n");
		return 0;
	}

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");

	for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
	     gpu_freq++) {
		I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
		I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
			   GEN6_PCODE_READ_MIN_FREQ_TABLE);
		if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
			      GEN6_PCODE_READY) == 0, 10)) {
			DRM_ERROR("pcode read of freq table timed out\n");
			continue;
		}
		ia_freq = I915_READ(GEN6_PCODE_DATA);
		seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
	}

	mutex_unlock(&dev->struct_mutex);

	return 0;
}

1293 1294 1295 1296 1297
static int i915_gfxec(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
1298 1299 1300 1301 1302
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
1303 1304 1305

	seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));

1306 1307
	mutex_unlock(&dev->struct_mutex);

1308 1309 1310
	return 0;
}

1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330
static int i915_opregion(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
	int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;

	if (opregion->header)
		seq_write(m, opregion->header, OPREGION_SIZE);

	mutex_unlock(&dev->struct_mutex);

	return 0;
}

1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351
static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	struct intel_fbdev *ifbdev;
	struct intel_framebuffer *fb;
	int ret;

	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
	if (ret)
		return ret;

	ifbdev = dev_priv->fbdev;
	fb = to_intel_framebuffer(ifbdev->helper.fb);

	seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
		   fb->base.width,
		   fb->base.height,
		   fb->base.depth,
		   fb->base.bits_per_pixel);
1352
	describe_obj(m, fb->obj);
1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363
	seq_printf(m, "\n");

	list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
		if (&fb->base == ifbdev->helper.fb)
			continue;

		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
			   fb->base.width,
			   fb->base.height,
			   fb->base.depth,
			   fb->base.bits_per_pixel);
1364
		describe_obj(m, fb->obj);
1365 1366 1367 1368 1369 1370 1371 1372
		seq_printf(m, "\n");
	}

	mutex_unlock(&dev->mode_config.mutex);

	return 0;
}

1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383
static int i915_context_status(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	drm_i915_private_t *dev_priv = dev->dev_private;
	int ret;

	ret = mutex_lock_interruptible(&dev->mode_config.mutex);
	if (ret)
		return ret;

1384 1385 1386 1387 1388
	if (dev_priv->pwrctx) {
		seq_printf(m, "power context ");
		describe_obj(m, dev_priv->pwrctx);
		seq_printf(m, "\n");
	}
1389

1390 1391 1392 1393 1394
	if (dev_priv->renderctx) {
		seq_printf(m, "render context ");
		describe_obj(m, dev_priv->renderctx);
		seq_printf(m, "\n");
	}
1395 1396 1397 1398 1399 1400

	mutex_unlock(&dev->mode_config.mutex);

	return 0;
}

1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412
static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
{
	struct drm_info_node *node = (struct drm_info_node *) m->private;
	struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;

	seq_printf(m, "forcewake count = %d\n",
		   atomic_read(&dev_priv->forcewake_count));

	return 0;
}

1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431
static int
i915_wedged_open(struct inode *inode,
		 struct file *filp)
{
	filp->private_data = inode->i_private;
	return 0;
}

static ssize_t
i915_wedged_read(struct file *filp,
		 char __user *ubuf,
		 size_t max,
		 loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
	int len;

1432
	len = snprintf(buf, sizeof(buf),
1433 1434 1435
		       "wedged :  %d\n",
		       atomic_read(&dev_priv->mm.wedged));

1436 1437
	if (len > sizeof(buf))
		len = sizeof(buf);
1438

1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452
	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_wedged_write(struct file *filp,
		  const char __user *ubuf,
		  size_t cnt,
		  loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	char buf[20];
	int val = 1;

	if (cnt > 0) {
1453
		if (cnt > sizeof(buf) - 1)
1454 1455 1456 1457 1458 1459 1460 1461 1462 1463
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	DRM_INFO("Manually setting wedged to %d\n", val);
1464
	i915_handle_error(dev, val);
1465 1466 1467 1468 1469 1470 1471 1472 1473

	return cnt;
}

static const struct file_operations i915_wedged_fops = {
	.owner = THIS_MODULE,
	.open = i915_wedged_open,
	.read = i915_wedged_read,
	.write = i915_wedged_write,
1474
	.llseek = default_llseek,
1475 1476
};

1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495
static int
i915_max_freq_open(struct inode *inode,
		   struct file *filp)
{
	filp->private_data = inode->i_private;
	return 0;
}

static ssize_t
i915_max_freq_read(struct file *filp,
		   char __user *ubuf,
		   size_t max,
		   loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
	int len;

1496
	len = snprintf(buf, sizeof(buf),
1497 1498
		       "max freq: %d\n", dev_priv->max_delay * 50);

1499 1500
	if (len > sizeof(buf))
		len = sizeof(buf);
1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516

	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_max_freq_write(struct file *filp,
		  const char __user *ubuf,
		  size_t cnt,
		  loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	struct drm_i915_private *dev_priv = dev->dev_private;
	char buf[20];
	int val = 1;

	if (cnt > 0) {
1517
		if (cnt > sizeof(buf) - 1)
1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);

	/*
	 * Turbo will still be enabled, but won't go above the set value.
	 */
	dev_priv->max_delay = val / 50;

	gen6_set_rps(dev, val / 50);

	return cnt;
}

static const struct file_operations i915_max_freq_fops = {
	.owner = THIS_MODULE,
	.open = i915_max_freq_open,
	.read = i915_max_freq_read,
	.write = i915_max_freq_write,
	.llseek = default_llseek,
};

1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570
static int
i915_cache_sharing_open(struct inode *inode,
		   struct file *filp)
{
	filp->private_data = inode->i_private;
	return 0;
}

static ssize_t
i915_cache_sharing_read(struct file *filp,
		   char __user *ubuf,
		   size_t max,
		   loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	drm_i915_private_t *dev_priv = dev->dev_private;
	char buf[80];
	u32 snpcr;
	int len;

	mutex_lock(&dev_priv->dev->struct_mutex);
	snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
	mutex_unlock(&dev_priv->dev->struct_mutex);

1571
	len = snprintf(buf, sizeof(buf),
1572 1573 1574
		       "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
		       GEN6_MBC_SNPCR_SHIFT);

1575 1576
	if (len > sizeof(buf))
		len = sizeof(buf);
1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593

	return simple_read_from_buffer(ubuf, max, ppos, buf, len);
}

static ssize_t
i915_cache_sharing_write(struct file *filp,
		  const char __user *ubuf,
		  size_t cnt,
		  loff_t *ppos)
{
	struct drm_device *dev = filp->private_data;
	struct drm_i915_private *dev_priv = dev->dev_private;
	char buf[20];
	u32 snpcr;
	int val = 1;

	if (cnt > 0) {
1594
		if (cnt > sizeof(buf) - 1)
1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625
			return -EINVAL;

		if (copy_from_user(buf, ubuf, cnt))
			return -EFAULT;
		buf[cnt] = 0;

		val = simple_strtoul(buf, NULL, 0);
	}

	if (val < 0 || val > 3)
		return -EINVAL;

	DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);

	/* Update the cache sharing policy here as well */
	snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
	snpcr &= ~GEN6_MBC_SNPCR_MASK;
	snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
	I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);

	return cnt;
}

static const struct file_operations i915_cache_sharing_fops = {
	.owner = THIS_MODULE,
	.open = i915_cache_sharing_open,
	.read = i915_cache_sharing_read,
	.write = i915_cache_sharing_write,
	.llseek = default_llseek,
};

1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643
/* As the drm_debugfs_init() routines are called before dev->dev_private is
 * allocated we need to hook into the minor for release. */
static int
drm_add_fake_info_node(struct drm_minor *minor,
		       struct dentry *ent,
		       const void *key)
{
	struct drm_info_node *node;

	node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
	if (node == NULL) {
		debugfs_remove(ent);
		return -ENOMEM;
	}

	node->minor = minor;
	node->dent = ent;
	node->info_ent = (void *) key;
1644 1645 1646 1647

	mutex_lock(&minor->debugfs_lock);
	list_add(&node->list, &minor->debugfs_list);
	mutex_unlock(&minor->debugfs_lock);
1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665

	return 0;
}

static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
{
	struct drm_device *dev = minor->dev;
	struct dentry *ent;

	ent = debugfs_create_file("i915_wedged",
				  S_IRUGO | S_IWUSR,
				  root, dev,
				  &i915_wedged_fops);
	if (IS_ERR(ent))
		return PTR_ERR(ent);

	return drm_add_fake_info_node(minor, ent, &i915_wedged_fops);
}
1666

1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718
static int i915_forcewake_open(struct inode *inode, struct file *file)
{
	struct drm_device *dev = inode->i_private;
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;

	if (!IS_GEN6(dev))
		return 0;

	ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)
		return ret;
	gen6_gt_force_wake_get(dev_priv);
	mutex_unlock(&dev->struct_mutex);

	return 0;
}

int i915_forcewake_release(struct inode *inode, struct file *file)
{
	struct drm_device *dev = inode->i_private;
	struct drm_i915_private *dev_priv = dev->dev_private;

	if (!IS_GEN6(dev))
		return 0;

	/*
	 * It's bad that we can potentially hang userspace if struct_mutex gets
	 * forever stuck.  However, if we cannot acquire this lock it means that
	 * almost certainly the driver has hung, is not unload-able. Therefore
	 * hanging here is probably a minor inconvenience not to be seen my
	 * almost every user.
	 */
	mutex_lock(&dev->struct_mutex);
	gen6_gt_force_wake_put(dev_priv);
	mutex_unlock(&dev->struct_mutex);

	return 0;
}

static const struct file_operations i915_forcewake_fops = {
	.owner = THIS_MODULE,
	.open = i915_forcewake_open,
	.release = i915_forcewake_release,
};

static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
{
	struct drm_device *dev = minor->dev;
	struct dentry *ent;

	ent = debugfs_create_file("i915_forcewake_user",
B
Ben Widawsky 已提交
1719
				  S_IRUSR,
1720 1721 1722 1723 1724
				  root, dev,
				  &i915_forcewake_fops);
	if (IS_ERR(ent))
		return PTR_ERR(ent);

B
Ben Widawsky 已提交
1725
	return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
1726 1727
}

1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742
static int i915_max_freq_create(struct dentry *root, struct drm_minor *minor)
{
	struct drm_device *dev = minor->dev;
	struct dentry *ent;

	ent = debugfs_create_file("i915_max_freq",
				  S_IRUGO | S_IWUSR,
				  root, dev,
				  &i915_max_freq_fops);
	if (IS_ERR(ent))
		return PTR_ERR(ent);

	return drm_add_fake_info_node(minor, ent, &i915_max_freq_fops);
}

1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757
static int i915_cache_sharing_create(struct dentry *root, struct drm_minor *minor)
{
	struct drm_device *dev = minor->dev;
	struct dentry *ent;

	ent = debugfs_create_file("i915_cache_sharing",
				  S_IRUGO | S_IWUSR,
				  root, dev,
				  &i915_cache_sharing_fops);
	if (IS_ERR(ent))
		return PTR_ERR(ent);

	return drm_add_fake_info_node(minor, ent, &i915_cache_sharing_fops);
}

1758
static struct drm_info_list i915_debugfs_list[] = {
C
Chris Wilson 已提交
1759
	{"i915_capabilities", i915_capabilities, 0},
1760
	{"i915_gem_objects", i915_gem_object_info, 0},
1761
	{"i915_gem_gtt", i915_gem_gtt_info, 0},
1762 1763 1764
	{"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
	{"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
	{"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
C
Chris Wilson 已提交
1765
	{"i915_gem_pinned", i915_gem_object_list_info, 0, (void *) PINNED_LIST},
1766
	{"i915_gem_deferred_free", i915_gem_object_list_info, 0, (void *) DEFERRED_FREE_LIST},
1767
	{"i915_gem_pageflip", i915_gem_pageflip_info, 0},
1768 1769
	{"i915_gem_request", i915_gem_request_info, 0},
	{"i915_gem_seqno", i915_gem_seqno_info, 0},
1770
	{"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
1771
	{"i915_gem_interrupt", i915_interrupt_info, 0},
1772 1773 1774 1775 1776 1777 1778 1779 1780
	{"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
	{"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
	{"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
	{"i915_ringbuffer_data", i915_ringbuffer_data, 0, (void *)RCS},
	{"i915_ringbuffer_info", i915_ringbuffer_info, 0, (void *)RCS},
	{"i915_bsd_ringbuffer_data", i915_ringbuffer_data, 0, (void *)VCS},
	{"i915_bsd_ringbuffer_info", i915_ringbuffer_info, 0, (void *)VCS},
	{"i915_blt_ringbuffer_data", i915_ringbuffer_data, 0, (void *)BCS},
	{"i915_blt_ringbuffer_info", i915_ringbuffer_info, 0, (void *)BCS},
1781
	{"i915_batchbuffers", i915_batchbuffer_info, 0},
1782
	{"i915_error_state", i915_error_state, 0},
1783 1784 1785 1786 1787
	{"i915_rstdby_delays", i915_rstdby_delays, 0},
	{"i915_cur_delayinfo", i915_cur_delayinfo, 0},
	{"i915_delayfreq_table", i915_delayfreq_table, 0},
	{"i915_inttoext_table", i915_inttoext_table, 0},
	{"i915_drpc_info", i915_drpc_info, 0},
1788
	{"i915_emon_status", i915_emon_status, 0},
1789
	{"i915_ring_freq_table", i915_ring_freq_table, 0},
1790
	{"i915_gfxec", i915_gfxec, 0},
1791
	{"i915_fbc_status", i915_fbc_status, 0},
1792
	{"i915_sr_status", i915_sr_status, 0},
1793
	{"i915_opregion", i915_opregion, 0},
1794
	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1795
	{"i915_context_status", i915_context_status, 0},
1796
	{"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
1797
};
1798
#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
1799

1800
int i915_debugfs_init(struct drm_minor *minor)
1801
{
1802 1803 1804 1805 1806 1807
	int ret;

	ret = i915_wedged_create(minor->debugfs_root, minor);
	if (ret)
		return ret;

1808
	ret = i915_forcewake_create(minor->debugfs_root, minor);
1809 1810 1811
	if (ret)
		return ret;
	ret = i915_max_freq_create(minor->debugfs_root, minor);
1812 1813 1814
	if (ret)
		return ret;
	ret = i915_cache_sharing_create(minor->debugfs_root, minor);
1815 1816 1817
	if (ret)
		return ret;

1818 1819
	return drm_debugfs_create_files(i915_debugfs_list,
					I915_DEBUGFS_ENTRIES,
1820 1821 1822
					minor->debugfs_root, minor);
}

1823
void i915_debugfs_cleanup(struct drm_minor *minor)
1824
{
1825 1826
	drm_debugfs_remove_files(i915_debugfs_list,
				 I915_DEBUGFS_ENTRIES, minor);
1827 1828
	drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
				 1, minor);
1829 1830
	drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
				 1, minor);
1831 1832
	drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
				 1, minor);
1833 1834
	drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
				 1, minor);
1835 1836 1837
}

#endif /* CONFIG_DEBUG_FS */