patch_hdmi.c 93.7 KB
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/*
 *
 *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
 *
 *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
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 *  Copyright (c) 2006 ATI Technologies Inc.
 *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
 *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
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 *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
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 *
 *  Authors:
 *			Wu Fengguang <wfg@linux.intel.com>
 *
 *  Maintained by:
 *			Wu Fengguang <wfg@linux.intel.com>
 *
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License as published by the Free
 *  Software Foundation; either version 2 of the License, or (at your option)
 *  any later version.
 *
 *  This program is distributed in the hope that it will be useful, but
 *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software Foundation,
 *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */

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#include <linux/init.h>
#include <linux/delay.h>
#include <linux/slab.h>
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#include <linux/module.h>
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#include <sound/core.h>
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#include <sound/jack.h>
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#include <sound/asoundef.h>
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#include <sound/tlv.h>
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#include "hda_codec.h"
#include "hda_local.h"
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#include "hda_jack.h"
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static bool static_hdmi_pcm;
module_param(static_hdmi_pcm, bool, 0644);
MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");

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#define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
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#define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
#define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))

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#define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
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struct hdmi_spec_per_cvt {
	hda_nid_t cvt_nid;
	int assigned;
	unsigned int channels_min;
	unsigned int channels_max;
	u32 rates;
	u64 formats;
	unsigned int maxbps;
};
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/* max. connections to a widget */
#define HDA_MAX_CONNECTIONS	32

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struct hdmi_spec_per_pin {
	hda_nid_t pin_nid;
	int num_mux_nids;
	hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
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	hda_nid_t cvt_nid;
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Wu Fengguang 已提交
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	struct hda_codec *codec;
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	struct hdmi_eld sink_eld;
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	struct mutex lock;
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	struct delayed_work work;
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	struct snd_kcontrol *eld_ctl;
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	int repoll_count;
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	bool setup; /* the stream has been set up by prepare callback */
	int channels; /* current number of channels */
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	bool non_pcm;
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	bool chmap_set;		/* channel-map override by ALSA API? */
	unsigned char chmap[8]; /* ALSA API channel-map */
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	char pcm_name[8];	/* filled in build_pcm callbacks */
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#ifdef CONFIG_PROC_FS
	struct snd_info_entry *proc_entry;
#endif
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};
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struct cea_channel_speaker_allocation;

/* operations used by generic code that can be overridden by patches */
struct hdmi_ops {
	int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
			   unsigned char *buf, int *eld_size);

	/* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
	int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
				    int asp_slot);
	int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
				    int asp_slot, int channel);

	void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
				    int ca, int active_channels, int conn_type);

	/* enable/disable HBR (HD passthrough) */
	int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);

	int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
			    hda_nid_t pin_nid, u32 stream_tag, int format);

	/* Helpers for producing the channel map TLVs. These can be overridden
	 * for devices that have non-standard mapping requirements. */
	int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
						 int channels);
	void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
				       unsigned int *chmap, int channels);

	/* check that the user-given chmap is supported */
	int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
};

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struct hdmi_spec {
	int num_cvts;
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	struct snd_array cvts; /* struct hdmi_spec_per_cvt */
	hda_nid_t cvt_nids[4]; /* only for haswell fix */
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	int num_pins;
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	struct snd_array pins; /* struct hdmi_spec_per_pin */
	struct snd_array pcm_rec; /* struct hda_pcm */
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	unsigned int channels_max; /* max over all cvts */
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	struct hdmi_eld temp_eld;
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	struct hdmi_ops ops;
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	bool dyn_pin_out;

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	/*
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	 * Non-generic VIA/NVIDIA specific
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	 */
	struct hda_multi_out multiout;
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	struct hda_pcm_stream pcm_playback;
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};


struct hdmi_audio_infoframe {
	u8 type; /* 0x84 */
	u8 ver;  /* 0x01 */
	u8 len;  /* 0x0a */

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	u8 checksum;

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	u8 CC02_CT47;	/* CC in bits 0:2, CT in 4:7 */
	u8 SS01_SF24;
	u8 CXT04;
	u8 CA;
	u8 LFEPBL01_LSV36_DM_INH7;
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};

struct dp_audio_infoframe {
	u8 type; /* 0x84 */
	u8 len;  /* 0x1b */
	u8 ver;  /* 0x11 << 2 */

	u8 CC02_CT47;	/* match with HDMI infoframe from this on */
	u8 SS01_SF24;
	u8 CXT04;
	u8 CA;
	u8 LFEPBL01_LSV36_DM_INH7;
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};

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union audio_infoframe {
	struct hdmi_audio_infoframe hdmi;
	struct dp_audio_infoframe dp;
	u8 bytes[0];
};

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/*
 * CEA speaker placement:
 *
 *        FLH       FCH        FRH
 *  FLW    FL  FLC   FC   FRC   FR   FRW
 *
 *                                  LFE
 *                     TC
 *
 *          RL  RLC   RC   RRC   RR
 *
 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
 */
enum cea_speaker_placement {
	FL  = (1 <<  0),	/* Front Left           */
	FC  = (1 <<  1),	/* Front Center         */
	FR  = (1 <<  2),	/* Front Right          */
	FLC = (1 <<  3),	/* Front Left Center    */
	FRC = (1 <<  4),	/* Front Right Center   */
	RL  = (1 <<  5),	/* Rear Left            */
	RC  = (1 <<  6),	/* Rear Center          */
	RR  = (1 <<  7),	/* Rear Right           */
	RLC = (1 <<  8),	/* Rear Left Center     */
	RRC = (1 <<  9),	/* Rear Right Center    */
	LFE = (1 << 10),	/* Low Frequency Effect */
	FLW = (1 << 11),	/* Front Left Wide      */
	FRW = (1 << 12),	/* Front Right Wide     */
	FLH = (1 << 13),	/* Front Left High      */
	FCH = (1 << 14),	/* Front Center High    */
	FRH = (1 << 15),	/* Front Right High     */
	TC  = (1 << 16),	/* Top Center           */
};

/*
 * ELD SA bits in the CEA Speaker Allocation data block
 */
static int eld_speaker_allocation_bits[] = {
	[0] = FL | FR,
	[1] = LFE,
	[2] = FC,
	[3] = RL | RR,
	[4] = RC,
	[5] = FLC | FRC,
	[6] = RLC | RRC,
	/* the following are not defined in ELD yet */
	[7] = FLW | FRW,
	[8] = FLH | FRH,
	[9] = TC,
	[10] = FCH,
};

struct cea_channel_speaker_allocation {
	int ca_index;
	int speakers[8];

	/* derived values, just for convenience */
	int channels;
	int spk_mask;
};

/*
 * ALSA sequence is:
 *
 *       surround40   surround41   surround50   surround51   surround71
 * ch0   front left   =            =            =            =
 * ch1   front right  =            =            =            =
 * ch2   rear left    =            =            =            =
 * ch3   rear right   =            =            =            =
 * ch4                LFE          center       center       center
 * ch5                                          LFE          LFE
 * ch6                                                       side left
 * ch7                                                       side right
 *
 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
 */
static int hdmi_channel_mapping[0x32][8] = {
	/* stereo */
	[0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
	/* 2.1 */
	[0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
	/* Dolby Surround */
	[0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
	/* surround40 */
	[0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
	/* 4ch */
	[0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
	/* surround41 */
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	[0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
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	/* surround50 */
	[0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
	/* surround51 */
	[0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
	/* 7.1 */
	[0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
};

/*
 * This is an ordered list!
 *
 * The preceding ones have better chances to be selected by
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 * hdmi_channel_allocation().
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 */
static struct cea_channel_speaker_allocation channel_allocations[] = {
/*			  channel:   7     6    5    4    3     2    1    0  */
{ .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
				 /* 2.1 */
{ .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
				 /* Dolby Surround */
{ .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
				 /* surround40 */
{ .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
				 /* surround41 */
{ .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
				 /* surround50 */
{ .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
				 /* surround51 */
{ .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
				 /* 6.1 */
{ .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
				 /* surround71 */
{ .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },

{ .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
{ .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
{ .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
{ .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
{ .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
{ .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
{ .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
{ .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
{ .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
{ .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
{ .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
{ .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
{ .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
{ .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
{ .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
};


/*
 * HDMI routines
 */

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#define get_pin(spec, idx) \
	((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
#define get_cvt(spec, idx) \
	((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
#define get_pcm_rec(spec, idx) \
	((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))

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static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
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{
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	struct hdmi_spec *spec = codec->spec;
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	int pin_idx;
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	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
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		if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
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			return pin_idx;
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	codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
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	return -EINVAL;
}

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static int hinfo_to_pin_index(struct hda_codec *codec,
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			      struct hda_pcm_stream *hinfo)
{
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	struct hdmi_spec *spec = codec->spec;
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	int pin_idx;

	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
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		if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
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			return pin_idx;

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	codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
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	return -EINVAL;
}

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static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
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{
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	struct hdmi_spec *spec = codec->spec;
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	int cvt_idx;

	for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
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		if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
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			return cvt_idx;

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	codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
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	return -EINVAL;
}

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static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
			struct snd_ctl_elem_info *uinfo)
{
	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
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	struct hdmi_spec *spec = codec->spec;
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	struct hdmi_spec_per_pin *per_pin;
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	struct hdmi_eld *eld;
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	int pin_idx;

	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;

	pin_idx = kcontrol->private_value;
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	per_pin = get_pin(spec, pin_idx);
	eld = &per_pin->sink_eld;
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	mutex_lock(&per_pin->lock);
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	uinfo->count = eld->eld_valid ? eld->eld_size : 0;
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	mutex_unlock(&per_pin->lock);
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	return 0;
}

static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
			struct snd_ctl_elem_value *ucontrol)
{
	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
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	struct hdmi_spec *spec = codec->spec;
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	struct hdmi_spec_per_pin *per_pin;
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	struct hdmi_eld *eld;
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	int pin_idx;

	pin_idx = kcontrol->private_value;
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	per_pin = get_pin(spec, pin_idx);
	eld = &per_pin->sink_eld;
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	mutex_lock(&per_pin->lock);
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	if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
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		mutex_unlock(&per_pin->lock);
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		snd_BUG();
		return -EINVAL;
	}

	memset(ucontrol->value.bytes.data, 0,
	       ARRAY_SIZE(ucontrol->value.bytes.data));
	if (eld->eld_valid)
		memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
		       eld->eld_size);
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	mutex_unlock(&per_pin->lock);
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	return 0;
}

static struct snd_kcontrol_new eld_bytes_ctl = {
	.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	.name = "ELD",
	.info = hdmi_eld_ctl_info,
	.get = hdmi_eld_ctl_get,
};

static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
			int device)
{
	struct snd_kcontrol *kctl;
	struct hdmi_spec *spec = codec->spec;
	int err;

	kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
	if (!kctl)
		return -ENOMEM;
	kctl->private_value = pin_idx;
	kctl->id.device = device;

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	err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
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	if (err < 0)
		return err;

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	get_pin(spec, pin_idx)->eld_ctl = kctl;
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	return 0;
}

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#ifdef BE_PARANOID
static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
				int *packet_index, int *byte_index)
{
	int val;

	val = snd_hda_codec_read(codec, pin_nid, 0,
				 AC_VERB_GET_HDMI_DIP_INDEX, 0);

	*packet_index = val >> 5;
	*byte_index = val & 0x1f;
}
#endif

static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
				int packet_index, int byte_index)
{
	int val;

	val = (packet_index << 5) | (byte_index & 0x1f);

	snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
}

static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
				unsigned char val)
{
	snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
}

507
static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
508
{
509 510 511
	struct hdmi_spec *spec = codec->spec;
	int pin_out;

512 513 514 515
	/* Unmute */
	if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
		snd_hda_codec_write(codec, pin_nid, 0,
				AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
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	if (spec->dyn_pin_out)
		/* Disable pin out until stream is active */
		pin_out = 0;
	else
		/* Enable pin out: some machines with GM965 gets broken output
		 * when the pin is disabled or changed while using with HDMI
		 */
		pin_out = PIN_OUT;

526
	snd_hda_codec_write(codec, pin_nid, 0,
527
			    AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
528 529
}

530
static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
531
{
532
	return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
533 534 535 536
					AC_VERB_GET_CVT_CHAN_COUNT, 0);
}

static void hdmi_set_channel_count(struct hda_codec *codec,
537
				   hda_nid_t cvt_nid, int chs)
538
{
539 540
	if (chs != hdmi_get_channel_count(codec, cvt_nid))
		snd_hda_codec_write(codec, cvt_nid, 0,
541 542 543
				    AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
}

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/*
 * ELD proc files
 */

#ifdef CONFIG_PROC_FS
static void print_eld_info(struct snd_info_entry *entry,
			   struct snd_info_buffer *buffer)
{
	struct hdmi_spec_per_pin *per_pin = entry->private_data;

	mutex_lock(&per_pin->lock);
	snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
	mutex_unlock(&per_pin->lock);
}

static void write_eld_info(struct snd_info_entry *entry,
			   struct snd_info_buffer *buffer)
{
	struct hdmi_spec_per_pin *per_pin = entry->private_data;

	mutex_lock(&per_pin->lock);
	snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
	mutex_unlock(&per_pin->lock);
}

static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
{
	char name[32];
	struct hda_codec *codec = per_pin->codec;
	struct snd_info_entry *entry;
	int err;

	snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
	err = snd_card_proc_new(codec->bus->card, name, &entry);
	if (err < 0)
		return err;

	snd_info_set_text_ops(entry, per_pin, print_eld_info);
	entry->c.text.write = write_eld_info;
	entry->mode |= S_IWUSR;
	per_pin->proc_entry = entry;

	return 0;
}

static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
{
	if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
		snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
		per_pin->proc_entry = NULL;
	}
}
#else
597 598
static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
			       int index)
599 600 601
{
	return 0;
}
602
static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
603 604 605
{
}
#endif
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/*
 * Channel mapping routines
 */

/*
 * Compute derived values in channel_allocations[].
 */
static void init_channel_allocations(void)
{
	int i, j;
	struct cea_channel_speaker_allocation *p;

	for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
		p = channel_allocations + i;
		p->channels = 0;
		p->spk_mask = 0;
		for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
			if (p->speakers[j]) {
				p->channels++;
				p->spk_mask |= p->speakers[j];
			}
	}
}

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static int get_channel_allocation_order(int ca)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
		if (channel_allocations[i].ca_index == ca)
			break;
	}
	return i;
}

642 643 644 645 646 647 648 649
/*
 * The transformation takes two steps:
 *
 *	eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
 *	      spk_mask => (channel_allocations[])         => ai->CA
 *
 * TODO: it could select the wrong CA from multiple candidates.
*/
650
static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
651 652
{
	int i;
653
	int ca = 0;
654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669
	int spk_mask = 0;
	char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];

	/*
	 * CA defaults to 0 for basic stereo audio
	 */
	if (channels <= 2)
		return 0;

	/*
	 * expand ELD's speaker allocation mask
	 *
	 * ELD tells the speaker mask in a compact(paired) form,
	 * expand ELD's notions to match the ones used by Audio InfoFrame.
	 */
	for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
670
		if (eld->info.spk_alloc & (1 << i))
671 672 673 674 675 676 677 678
			spk_mask |= eld_speaker_allocation_bits[i];
	}

	/* search for the first working match in the CA table */
	for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
		if (channels == channel_allocations[i].channels &&
		    (spk_mask & channel_allocations[i].spk_mask) ==
				channel_allocations[i].spk_mask) {
679
			ca = channel_allocations[i].ca_index;
680 681 682 683
			break;
		}
	}

684 685 686 687 688 689 690 691 692 693 694
	if (!ca) {
		/* if there was no match, select the regular ALSA channel
		 * allocation with the matching number of channels */
		for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
			if (channels == channel_allocations[i].channels) {
				ca = channel_allocations[i].ca_index;
				break;
			}
		}
	}

695
	snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
696
	snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
697
		    ca, channels, buf);
698

699
	return ca;
700 701 702 703 704 705
}

static void hdmi_debug_channel_mapping(struct hda_codec *codec,
				       hda_nid_t pin_nid)
{
#ifdef CONFIG_SND_DEBUG_VERBOSE
706
	struct hdmi_spec *spec = codec->spec;
707
	int i;
708
	int channel;
709 710

	for (i = 0; i < 8; i++) {
711
		channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
712
		codec_dbg(codec, "HDMI: ASP channel %d => slot %d\n",
713
						channel, i);
714 715 716 717
	}
#endif
}

718
static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
719
				       hda_nid_t pin_nid,
720
				       bool non_pcm,
721
				       int ca)
722
{
723
	struct hdmi_spec *spec = codec->spec;
724
	struct cea_channel_speaker_allocation *ch_alloc;
725 726
	int i;
	int err;
727
	int order;
728
	int non_pcm_mapping[8];
729

730
	order = get_channel_allocation_order(ca);
731
	ch_alloc = &channel_allocations[order];
732

733
	if (hdmi_channel_mapping[ca][1] == 0) {
734 735 736 737 738 739 740 741 742 743 744 745
		int hdmi_slot = 0;
		/* fill actual channel mappings in ALSA channel (i) order */
		for (i = 0; i < ch_alloc->channels; i++) {
			while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
				hdmi_slot++; /* skip zero slots */

			hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
		}
		/* fill the rest of the slots with ALSA channel 0xf */
		for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
			if (!ch_alloc->speakers[7 - hdmi_slot])
				hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
746 747
	}

748
	if (non_pcm) {
749
		for (i = 0; i < ch_alloc->channels; i++)
750
			non_pcm_mapping[i] = (i << 4) | i;
751
		for (; i < 8; i++)
752
			non_pcm_mapping[i] = (0xf << 4) | i;
753 754
	}

755
	for (i = 0; i < 8; i++) {
756 757 758 759
		int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
		int hdmi_slot = slotsetup & 0x0f;
		int channel = (slotsetup & 0xf0) >> 4;
		err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
760
		if (err) {
761
			codec_dbg(codec, "HDMI: channel mapping failed\n");
762 763 764 765 766
			break;
		}
	}
}

767 768 769 770 771 772
struct channel_map_table {
	unsigned char map;		/* ALSA API channel map position */
	int spk_mask;			/* speaker position bit mask */
};

static struct channel_map_table map_tables[] = {
773 774 775 776 777 778 779 780 781 782 783
	{ SNDRV_CHMAP_FL,	FL },
	{ SNDRV_CHMAP_FR,	FR },
	{ SNDRV_CHMAP_RL,	RL },
	{ SNDRV_CHMAP_RR,	RR },
	{ SNDRV_CHMAP_LFE,	LFE },
	{ SNDRV_CHMAP_FC,	FC },
	{ SNDRV_CHMAP_RLC,	RLC },
	{ SNDRV_CHMAP_RRC,	RRC },
	{ SNDRV_CHMAP_RC,	RC },
	{ SNDRV_CHMAP_FLC,	FLC },
	{ SNDRV_CHMAP_FRC,	FRC },
784 785
	{ SNDRV_CHMAP_TFL,	FLH },
	{ SNDRV_CHMAP_TFR,	FRH },
786 787 788
	{ SNDRV_CHMAP_FLW,	FLW },
	{ SNDRV_CHMAP_FRW,	FRW },
	{ SNDRV_CHMAP_TC,	TC },
789
	{ SNDRV_CHMAP_TFC,	FCH },
790 791 792 793 794 795 796 797 798 799 800 801 802 803 804
	{} /* terminator */
};

/* from ALSA API channel position to speaker bit mask */
static int to_spk_mask(unsigned char c)
{
	struct channel_map_table *t = map_tables;
	for (; t->map; t++) {
		if (t->map == c)
			return t->spk_mask;
	}
	return 0;
}

/* from ALSA API channel position to CEA slot */
805
static int to_cea_slot(int ordered_ca, unsigned char pos)
806
{
807 808
	int mask = to_spk_mask(pos);
	int i;
809

810 811 812 813 814
	if (mask) {
		for (i = 0; i < 8; i++) {
			if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
				return i;
		}
815
	}
816 817

	return -1;
818 819 820 821 822 823 824 825 826 827 828 829 830
}

/* from speaker bit mask to ALSA API channel position */
static int spk_to_chmap(int spk)
{
	struct channel_map_table *t = map_tables;
	for (; t->map; t++) {
		if (t->spk_mask == spk)
			return t->map;
	}
	return 0;
}

831 832 833 834 835 836 837 838
/* from CEA slot to ALSA API channel position */
static int from_cea_slot(int ordered_ca, unsigned char slot)
{
	int mask = channel_allocations[ordered_ca].speakers[7 - slot];

	return spk_to_chmap(mask);
}

839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864
/* get the CA index corresponding to the given ALSA API channel map */
static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
{
	int i, spks = 0, spk_mask = 0;

	for (i = 0; i < chs; i++) {
		int mask = to_spk_mask(map[i]);
		if (mask) {
			spk_mask |= mask;
			spks++;
		}
	}

	for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
		if ((chs == channel_allocations[i].channels ||
		     spks == channel_allocations[i].channels) &&
		    (spk_mask & channel_allocations[i].spk_mask) ==
				channel_allocations[i].spk_mask)
			return channel_allocations[i].ca_index;
	}
	return -1;
}

/* set up the channel slots for the given ALSA API channel map */
static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
					     hda_nid_t pin_nid,
865 866
					     int chs, unsigned char *map,
					     int ca)
867
{
868
	struct hdmi_spec *spec = codec->spec;
869
	int ordered_ca = get_channel_allocation_order(ca);
870 871 872 873 874
	int alsa_pos, hdmi_slot;
	int assignments[8] = {[0 ... 7] = 0xf};

	for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {

875
		hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
876 877 878 879 880 881 882 883

		if (hdmi_slot < 0)
			continue; /* unassigned channel */

		assignments[hdmi_slot] = alsa_pos;
	}

	for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
884
		int err;
885

886 887
		err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
						     assignments[hdmi_slot]);
888 889 890 891 892 893 894 895 896 897
		if (err)
			return -EINVAL;
	}
	return 0;
}

/* store ALSA API channel map from the current default map */
static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
{
	int i;
898
	int ordered_ca = get_channel_allocation_order(ca);
899
	for (i = 0; i < 8; i++) {
900
		if (i < channel_allocations[ordered_ca].channels)
901
			map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
902 903 904 905 906 907 908
		else
			map[i] = 0;
	}
}

static void hdmi_setup_channel_mapping(struct hda_codec *codec,
				       hda_nid_t pin_nid, bool non_pcm, int ca,
909 910
				       int channels, unsigned char *map,
				       bool chmap_set)
911
{
912
	if (!non_pcm && chmap_set) {
913
		hdmi_manual_setup_channel_mapping(codec, pin_nid,
914
						  channels, map, ca);
915 916 917 918
	} else {
		hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
		hdmi_setup_fake_chmap(map, ca);
	}
919 920

	hdmi_debug_channel_mapping(codec, pin_nid);
921
}
922

923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938
static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
				     int asp_slot, int channel)
{
	return snd_hda_codec_write(codec, pin_nid, 0,
				   AC_VERB_SET_HDMI_CHAN_SLOT,
				   (channel << 4) | asp_slot);
}

static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
				     int asp_slot)
{
	return (snd_hda_codec_read(codec, pin_nid, 0,
				   AC_VERB_GET_HDMI_CHAN_SLOT,
				   asp_slot) & 0xf0) >> 4;
}

939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971
/*
 * Audio InfoFrame routines
 */

/*
 * Enable Audio InfoFrame Transmission
 */
static void hdmi_start_infoframe_trans(struct hda_codec *codec,
				       hda_nid_t pin_nid)
{
	hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
	snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
						AC_DIPXMIT_BEST);
}

/*
 * Disable Audio InfoFrame Transmission
 */
static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
				      hda_nid_t pin_nid)
{
	hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
	snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
						AC_DIPXMIT_DISABLE);
}

static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
{
#ifdef CONFIG_SND_DEBUG_VERBOSE
	int i;
	int size;

	size = snd_hdmi_get_eld_size(codec, pin_nid);
972
	codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
973 974 975 976

	for (i = 0; i < 8; i++) {
		size = snd_hda_codec_read(codec, pin_nid, 0,
						AC_VERB_GET_HDMI_DIP_SIZE, i);
977
		codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998
	}
#endif
}

static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
{
#ifdef BE_PARANOID
	int i, j;
	int size;
	int pi, bi;
	for (i = 0; i < 8; i++) {
		size = snd_hda_codec_read(codec, pin_nid, 0,
						AC_VERB_GET_HDMI_DIP_SIZE, i);
		if (size == 0)
			continue;

		hdmi_set_dip_index(codec, pin_nid, i, 0x0);
		for (j = 1; j < 1000; j++) {
			hdmi_write_dip_byte(codec, pin_nid, 0x0);
			hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
			if (pi != i)
999
				codec_dbg(codec, "dip index %d: %d != %d\n",
1000 1001 1002 1003
						bi, pi, i);
			if (bi == 0) /* byte index wrapped around */
				break;
		}
1004
		codec_dbg(codec,
1005 1006 1007 1008 1009 1010
			"HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
			i, size, j);
	}
#endif
}

1011
static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
1012
{
1013
	u8 *bytes = (u8 *)hdmi_ai;
1014 1015 1016
	u8 sum = 0;
	int i;

1017
	hdmi_ai->checksum = 0;
1018

1019
	for (i = 0; i < sizeof(*hdmi_ai); i++)
1020 1021
		sum += bytes[i];

1022
	hdmi_ai->checksum = -sum;
1023 1024 1025 1026
}

static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
				      hda_nid_t pin_nid,
1027
				      u8 *dip, int size)
1028 1029 1030 1031 1032 1033 1034
{
	int i;

	hdmi_debug_dip_size(codec, pin_nid);
	hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */

	hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1035 1036
	for (i = 0; i < size; i++)
		hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1037 1038 1039
}

static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1040
				    u8 *dip, int size)
1041 1042 1043 1044 1045 1046 1047 1048 1049
{
	u8 val;
	int i;

	if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
							    != AC_DIPXMIT_BEST)
		return false;

	hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1050
	for (i = 0; i < size; i++) {
1051 1052
		val = snd_hda_codec_read(codec, pin_nid, 0,
					 AC_VERB_GET_HDMI_DIP_DATA, 0);
1053
		if (val != dip[i])
1054 1055 1056 1057 1058 1059
			return false;
	}

	return true;
}

1060 1061 1062 1063 1064 1065 1066
static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
				     hda_nid_t pin_nid,
				     int ca, int active_channels,
				     int conn_type)
{
	union audio_infoframe ai;

1067
	memset(&ai, 0, sizeof(ai));
1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085
	if (conn_type == 0) { /* HDMI */
		struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;

		hdmi_ai->type		= 0x84;
		hdmi_ai->ver		= 0x01;
		hdmi_ai->len		= 0x0a;
		hdmi_ai->CC02_CT47	= active_channels - 1;
		hdmi_ai->CA		= ca;
		hdmi_checksum_audio_infoframe(hdmi_ai);
	} else if (conn_type == 1) { /* DisplayPort */
		struct dp_audio_infoframe *dp_ai = &ai.dp;

		dp_ai->type		= 0x84;
		dp_ai->len		= 0x1b;
		dp_ai->ver		= 0x11 << 2;
		dp_ai->CC02_CT47	= active_channels - 1;
		dp_ai->CA		= ca;
	} else {
1086
		codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097
			    pin_nid);
		return;
	}

	/*
	 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
	 * sizeof(*dp_ai) to avoid partial match/update problems when
	 * the user switches between HDMI/DP monitors.
	 */
	if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
					sizeof(ai))) {
1098 1099
		codec_dbg(codec,
			  "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
1100 1101 1102 1103 1104 1105 1106 1107 1108
			    pin_nid,
			    active_channels, ca);
		hdmi_stop_infoframe_trans(codec, pin_nid);
		hdmi_fill_audio_infoframe(codec, pin_nid,
					    ai.bytes, sizeof(ai));
		hdmi_start_infoframe_trans(codec, pin_nid);
	}
}

1109 1110 1111
static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
				       struct hdmi_spec_per_pin *per_pin,
				       bool non_pcm)
1112
{
1113
	struct hdmi_spec *spec = codec->spec;
1114
	hda_nid_t pin_nid = per_pin->pin_nid;
1115
	int channels = per_pin->channels;
1116
	int active_channels;
1117
	struct hdmi_eld *eld;
1118
	int ca, ordered_ca;
1119

1120 1121 1122
	if (!channels)
		return;

1123
	if (is_haswell_plus(codec))
1124 1125 1126 1127
		snd_hda_codec_write(codec, pin_nid, 0,
					    AC_VERB_SET_AMP_GAIN_MUTE,
					    AMP_OUT_UNMUTE);

1128
	eld = &per_pin->sink_eld;
1129 1130
	if (!eld->monitor_present)
		return;
1131

1132 1133 1134 1135 1136 1137
	if (!non_pcm && per_pin->chmap_set)
		ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
	else
		ca = hdmi_channel_allocation(eld, channels);
	if (ca < 0)
		ca = 0;
1138

1139 1140 1141 1142 1143
	ordered_ca = get_channel_allocation_order(ca);
	active_channels = channel_allocations[ordered_ca].channels;

	hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);

1144 1145 1146 1147 1148 1149 1150 1151
	/*
	 * always configure channel mapping, it may have been changed by the
	 * user in the meantime
	 */
	hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
				   channels, per_pin->chmap,
				   per_pin->chmap_set);

1152 1153
	spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
				      eld->info.conn_type);
1154

1155
	per_pin->non_pcm = non_pcm;
1156 1157 1158 1159 1160 1161
}

/*
 * Unsolicited events
 */

1162
static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1163

1164
static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1165 1166
{
	struct hdmi_spec *spec = codec->spec;
1167
	int pin_idx = pin_nid_to_pin_index(codec, jack->nid);
1168 1169 1170 1171 1172 1173 1174 1175 1176
	if (pin_idx < 0)
		return;

	if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
		snd_hda_jack_report_sync(codec);
}

static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
{
1177 1178
	int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
	struct hda_jack_tbl *jack;
1179
	int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1180 1181 1182 1183 1184

	jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
	if (!jack)
		return;
	jack->jack_dirty = 1;
1185

1186
	codec_dbg(codec,
1187
		"HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1188
		codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1189
		!!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1190

1191
	jack_callback(codec, jack);
1192 1193 1194 1195 1196 1197 1198 1199 1200
}

static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
{
	int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
	int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
	int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
	int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);

1201
	codec_info(codec,
1202
		"HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1203
		codec->addr,
1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221
		tag,
		subtag,
		cp_state,
		cp_ready);

	/* TODO */
	if (cp_state)
		;
	if (cp_ready)
		;
}


static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
{
	int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
	int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;

1222
	if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1223
		codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
1224 1225 1226 1227 1228 1229 1230 1231 1232
		return;
	}

	if (subtag == 0)
		hdmi_intrinsic_event(codec, res);
	else
		hdmi_non_intrinsic_event(codec, res);
}

1233
static void haswell_verify_D0(struct hda_codec *codec,
1234
		hda_nid_t cvt_nid, hda_nid_t nid)
1235
{
1236
	int pwr;
1237

1238 1239 1240
	/* For Haswell, the converter 1/2 may keep in D3 state after bootup,
	 * thus pins could only choose converter 0 for use. Make sure the
	 * converters are in correct power state */
1241
	if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1242 1243
		snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);

1244
	if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1245 1246 1247 1248 1249
		snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
				    AC_PWRST_D0);
		msleep(40);
		pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
		pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1250
		codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1251 1252 1253
	}
}

1254 1255 1256 1257
/*
 * Callbacks
 */

1258 1259 1260 1261
/* HBR should be Non-PCM, 8 channels */
#define is_hbr_format(format) \
	((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)

1262 1263
static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
			      bool hbr)
1264
{
1265
	int pinctl, new_pinctl;
1266

1267 1268
	if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
		pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1269 1270
					    AC_VERB_GET_PIN_WIDGET_CONTROL, 0);

1271 1272 1273
		if (pinctl < 0)
			return hbr ? -EINVAL : 0;

1274
		new_pinctl = pinctl & ~AC_PINCTL_EPT;
1275
		if (hbr)
1276 1277 1278 1279
			new_pinctl |= AC_PINCTL_EPT_HBR;
		else
			new_pinctl |= AC_PINCTL_EPT_NATIVE;

1280 1281
		codec_dbg(codec,
			  "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
1282
			    pin_nid,
1283 1284 1285 1286
			    pinctl == new_pinctl ? "" : "new-",
			    new_pinctl);

		if (pinctl != new_pinctl)
1287
			snd_hda_codec_write(codec, pin_nid, 0,
1288 1289
					    AC_VERB_SET_PIN_WIDGET_CONTROL,
					    new_pinctl);
1290 1291
	} else if (hbr)
		return -EINVAL;
1292

1293 1294 1295 1296 1297 1298 1299 1300 1301
	return 0;
}

static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
			      hda_nid_t pin_nid, u32 stream_tag, int format)
{
	struct hdmi_spec *spec = codec->spec;
	int err;

1302
	if (is_haswell_plus(codec))
1303 1304 1305 1306 1307
		haswell_verify_D0(codec, cvt_nid, pin_nid);

	err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));

	if (err) {
1308
		codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
1309
		return err;
1310
	}
1311

1312
	snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1313
	return 0;
1314 1315
}

1316 1317
static int hdmi_choose_cvt(struct hda_codec *codec,
			int pin_idx, int *cvt_id, int *mux_id)
1318 1319
{
	struct hdmi_spec *spec = codec->spec;
1320 1321
	struct hdmi_spec_per_pin *per_pin;
	struct hdmi_spec_per_cvt *per_cvt = NULL;
1322
	int cvt_idx, mux_idx = 0;
1323

1324
	per_pin = get_pin(spec, pin_idx);
1325 1326 1327

	/* Dynamically assign converter to stream */
	for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1328
		per_cvt = get_cvt(spec, cvt_idx);
1329

1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341
		/* Must not already be assigned */
		if (per_cvt->assigned)
			continue;
		/* Must be in pin's mux's list of converters */
		for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
			if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
				break;
		/* Not in mux list */
		if (mux_idx == per_pin->num_mux_nids)
			continue;
		break;
	}
1342

1343 1344 1345 1346
	/* No free converters */
	if (cvt_idx == spec->num_cvts)
		return -ENODEV;

1347 1348 1349 1350 1351 1352 1353 1354
	if (cvt_id)
		*cvt_id = cvt_idx;
	if (mux_id)
		*mux_id = mux_idx;

	return 0;
}

1355 1356 1357 1358 1359 1360 1361 1362 1363 1364
/* Intel HDMI workaround to fix audio routing issue:
 * For some Intel display codecs, pins share the same connection list.
 * So a conveter can be selected by multiple pins and playback on any of these
 * pins will generate sound on the external display, because audio flows from
 * the same converter to the display pipeline. Also muting one pin may make
 * other pins have no sound output.
 * So this function assures that an assigned converter for a pin is not selected
 * by any other pins.
 */
static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1365
			hda_nid_t pin_nid, int mux_idx)
1366 1367
{
	struct hdmi_spec *spec = codec->spec;
1368 1369 1370
	hda_nid_t nid, end_nid;
	int cvt_idx, curr;
	struct hdmi_spec_per_cvt *per_cvt;
1371

1372 1373 1374 1375 1376 1377 1378 1379
	/* configure all pins, including "no physical connection" ones */
	end_nid = codec->start_nid + codec->num_nodes;
	for (nid = codec->start_nid; nid < end_nid; nid++) {
		unsigned int wid_caps = get_wcaps(codec, nid);
		unsigned int wid_type = get_wcaps_type(wid_caps);

		if (wid_type != AC_WID_PIN)
			continue;
1380

1381
		if (nid == pin_nid)
1382 1383
			continue;

1384
		curr = snd_hda_codec_read(codec, nid, 0,
1385
					  AC_VERB_GET_CONNECT_SEL, 0);
1386 1387
		if (curr != mux_idx)
			continue;
1388

1389 1390 1391 1392 1393 1394
		/* choose an unassigned converter. The conveters in the
		 * connection list are in the same order as in the codec.
		 */
		for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
			per_cvt = get_cvt(spec, cvt_idx);
			if (!per_cvt->assigned) {
1395 1396
				codec_dbg(codec,
					  "choose cvt %d for pin nid %d\n",
1397 1398
					cvt_idx, nid);
				snd_hda_codec_write_cache(codec, nid, 0,
1399
					    AC_VERB_SET_CONNECT_SEL,
1400 1401 1402
					    cvt_idx);
				break;
			}
1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422
		}
	}
}

/*
 * HDA PCM callbacks
 */
static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
			 struct hda_codec *codec,
			 struct snd_pcm_substream *substream)
{
	struct hdmi_spec *spec = codec->spec;
	struct snd_pcm_runtime *runtime = substream->runtime;
	int pin_idx, cvt_idx, mux_idx = 0;
	struct hdmi_spec_per_pin *per_pin;
	struct hdmi_eld *eld;
	struct hdmi_spec_per_cvt *per_cvt = NULL;
	int err;

	/* Validate hinfo */
1423
	pin_idx = hinfo_to_pin_index(codec, hinfo);
1424 1425 1426 1427 1428 1429 1430 1431 1432 1433
	if (snd_BUG_ON(pin_idx < 0))
		return -EINVAL;
	per_pin = get_pin(spec, pin_idx);
	eld = &per_pin->sink_eld;

	err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
	if (err < 0)
		return err;

	per_cvt = get_cvt(spec, cvt_idx);
1434 1435
	/* Claim converter */
	per_cvt->assigned = 1;
1436
	per_pin->cvt_nid = per_cvt->cvt_nid;
1437 1438
	hinfo->nid = per_cvt->cvt_nid;

1439
	snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1440 1441
			    AC_VERB_SET_CONNECT_SEL,
			    mux_idx);
1442 1443

	/* configure unused pins to choose other converters */
1444
	if (is_haswell_plus(codec) || is_valleyview(codec))
1445
		intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1446

1447
	snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1448

1449
	/* Initially set the converter's capabilities */
1450 1451 1452 1453 1454
	hinfo->channels_min = per_cvt->channels_min;
	hinfo->channels_max = per_cvt->channels_max;
	hinfo->rates = per_cvt->rates;
	hinfo->formats = per_cvt->formats;
	hinfo->maxbps = per_cvt->maxbps;
1455

1456
	/* Restrict capabilities by ELD if this isn't disabled */
1457
	if (!static_hdmi_pcm && eld->eld_valid) {
1458
		snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1459
		if (hinfo->channels_min > hinfo->channels_max ||
1460 1461 1462 1463
		    !hinfo->rates || !hinfo->formats) {
			per_cvt->assigned = 0;
			hinfo->nid = 0;
			snd_hda_spdif_ctls_unassign(codec, pin_idx);
1464
			return -ENODEV;
1465
		}
1466
	}
1467 1468

	/* Store the updated parameters */
1469 1470 1471 1472
	runtime->hw.channels_min = hinfo->channels_min;
	runtime->hw.channels_max = hinfo->channels_max;
	runtime->hw.formats = hinfo->formats;
	runtime->hw.rates = hinfo->rates;
1473 1474 1475

	snd_pcm_hw_constraint_step(substream->runtime, 0,
				   SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1476 1477 1478
	return 0;
}

1479 1480 1481
/*
 * HDA/HDMI auto parsing
 */
1482
static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1483 1484
{
	struct hdmi_spec *spec = codec->spec;
1485
	struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1486
	hda_nid_t pin_nid = per_pin->pin_nid;
1487 1488

	if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1489 1490
		codec_warn(codec,
			   "HDMI: pin %d wcaps %#x does not support connection list\n",
1491 1492 1493 1494
			   pin_nid, get_wcaps(codec, pin_nid));
		return -EINVAL;
	}

1495 1496 1497
	per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
							per_pin->mux_nids,
							HDA_MAX_CONNECTIONS);
1498 1499 1500 1501

	return 0;
}

1502
static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1503
{
1504
	struct hda_jack_tbl *jack;
W
Wu Fengguang 已提交
1505
	struct hda_codec *codec = per_pin->codec;
1506 1507 1508
	struct hdmi_spec *spec = codec->spec;
	struct hdmi_eld *eld = &spec->temp_eld;
	struct hdmi_eld *pin_eld = &per_pin->sink_eld;
W
Wu Fengguang 已提交
1509
	hda_nid_t pin_nid = per_pin->pin_nid;
1510 1511 1512 1513 1514 1515 1516 1517
	/*
	 * Always execute a GetPinSense verb here, even when called from
	 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
	 * response's PD bit is not the real PD value, but indicates that
	 * the real PD value changed. An older version of the HD-audio
	 * specification worked this way. Hence, we just ignore the data in
	 * the unsolicited response to avoid custom WARs.
	 */
1518
	int present;
1519 1520
	bool update_eld = false;
	bool eld_changed = false;
1521
	bool ret;
1522

1523 1524 1525
	snd_hda_power_up(codec);
	present = snd_hda_pin_sense(codec, pin_nid);

1526
	mutex_lock(&per_pin->lock);
1527 1528 1529 1530 1531
	pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
	if (pin_eld->monitor_present)
		eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
	else
		eld->eld_valid = false;
1532

1533
	codec_dbg(codec,
1534
		"HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1535
		codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1536

1537
	if (eld->eld_valid) {
1538
		if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1539
						     &eld->eld_size) < 0)
1540
			eld->eld_valid = false;
1541 1542 1543 1544
		else {
			memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
			if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
						    eld->eld_size) < 0)
1545
				eld->eld_valid = false;
1546 1547
		}

1548
		if (eld->eld_valid) {
1549
			snd_hdmi_show_eld(&eld->info);
1550
			update_eld = true;
1551
		}
1552
		else if (repoll) {
W
Wu Fengguang 已提交
1553 1554 1555
			queue_delayed_work(codec->bus->workq,
					   &per_pin->work,
					   msecs_to_jiffies(300));
1556
			goto unlock;
W
Wu Fengguang 已提交
1557 1558
		}
	}
1559

1560
	if (pin_eld->eld_valid && !eld->eld_valid) {
1561
		update_eld = true;
1562 1563
		eld_changed = true;
	}
1564
	if (update_eld) {
1565
		bool old_eld_valid = pin_eld->eld_valid;
1566
		pin_eld->eld_valid = eld->eld_valid;
1567 1568
		eld_changed = pin_eld->eld_size != eld->eld_size ||
			      memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1569 1570 1571 1572 1573 1574
				     eld->eld_size) != 0;
		if (eld_changed)
			memcpy(pin_eld->eld_buffer, eld->eld_buffer,
			       eld->eld_size);
		pin_eld->eld_size = eld->eld_size;
		pin_eld->info = eld->info;
1575

1576 1577 1578 1579
		/*
		 * Re-setup pin and infoframe. This is needed e.g. when
		 * - sink is first plugged-in (infoframe is not set up if !monitor_present)
		 * - transcoder can change during stream playback on Haswell
1580
		 */
1581
		if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1582 1583
			hdmi_setup_audio_infoframe(codec, per_pin,
						   per_pin->non_pcm);
1584
	}
1585 1586 1587 1588 1589

	if (eld_changed)
		snd_ctl_notify(codec->bus->card,
			       SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
			       &per_pin->eld_ctl->id);
1590
 unlock:
1591
	ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1592 1593 1594 1595 1596

	jack = snd_hda_jack_tbl_get(codec, pin_nid);
	if (jack)
		jack->block_report = !ret;

1597
	mutex_unlock(&per_pin->lock);
1598
	snd_hda_power_down(codec);
1599
	return ret;
1600 1601
}

W
Wu Fengguang 已提交
1602 1603 1604 1605 1606
static void hdmi_repoll_eld(struct work_struct *work)
{
	struct hdmi_spec_per_pin *per_pin =
	container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);

1607 1608 1609
	if (per_pin->repoll_count++ > 6)
		per_pin->repoll_count = 0;

1610 1611
	if (hdmi_present_sense(per_pin, per_pin->repoll_count))
		snd_hda_jack_report_sync(per_pin->codec);
W
Wu Fengguang 已提交
1612 1613
}

1614 1615 1616
static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
					     hda_nid_t nid);

1617 1618 1619
static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
{
	struct hdmi_spec *spec = codec->spec;
1620 1621 1622
	unsigned int caps, config;
	int pin_idx;
	struct hdmi_spec_per_pin *per_pin;
1623
	int err;
1624

1625
	caps = snd_hda_query_pin_caps(codec, pin_nid);
1626 1627 1628
	if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
		return 0;

1629
	config = snd_hda_codec_get_pincfg(codec, pin_nid);
1630 1631 1632
	if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
		return 0;

1633
	if (is_haswell_plus(codec))
1634 1635
		intel_haswell_fixup_connect_list(codec, pin_nid);

1636
	pin_idx = spec->num_pins;
1637 1638 1639
	per_pin = snd_array_new(&spec->pins);
	if (!per_pin)
		return -ENOMEM;
1640 1641

	per_pin->pin_nid = pin_nid;
1642
	per_pin->non_pcm = false;
1643

1644 1645 1646
	err = hdmi_read_pin_conn(codec, pin_idx);
	if (err < 0)
		return err;
1647 1648 1649

	spec->num_pins++;

1650
	return 0;
1651 1652
}

1653
static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1654 1655
{
	struct hdmi_spec *spec = codec->spec;
1656 1657 1658
	struct hdmi_spec_per_cvt *per_cvt;
	unsigned int chans;
	int err;
1659

1660 1661 1662
	chans = get_wcaps(codec, cvt_nid);
	chans = get_wcaps_channels(chans);

1663 1664 1665
	per_cvt = snd_array_new(&spec->cvts);
	if (!per_cvt)
		return -ENOMEM;
1666 1667 1668

	per_cvt->cvt_nid = cvt_nid;
	per_cvt->channels_min = 2;
1669
	if (chans <= 16) {
1670
		per_cvt->channels_max = chans;
1671 1672 1673
		if (chans > spec->channels_max)
			spec->channels_max = chans;
	}
1674 1675 1676 1677 1678 1679 1680 1681

	err = snd_hda_query_supported_pcm(codec, cvt_nid,
					  &per_cvt->rates,
					  &per_cvt->formats,
					  &per_cvt->maxbps);
	if (err < 0)
		return err;

1682 1683 1684
	if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
		spec->cvt_nids[spec->num_cvts] = cvt_nid;
	spec->num_cvts++;
1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695

	return 0;
}

static int hdmi_parse_codec(struct hda_codec *codec)
{
	hda_nid_t nid;
	int i, nodes;

	nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
	if (!nid || nodes < 0) {
1696
		codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1697 1698 1699 1700 1701 1702 1703
		return -EINVAL;
	}

	for (i = 0; i < nodes; i++, nid++) {
		unsigned int caps;
		unsigned int type;

1704
		caps = get_wcaps(codec, nid);
1705 1706 1707 1708 1709 1710 1711
		type = get_wcaps_type(caps);

		if (!(caps & AC_WCAP_DIGITAL))
			continue;

		switch (type) {
		case AC_WID_AUD_OUT:
1712
			hdmi_add_cvt(codec, nid);
1713 1714
			break;
		case AC_WID_PIN:
1715
			hdmi_add_pin(codec, nid);
1716 1717 1718 1719 1720 1721 1722
			break;
		}
	}

	return 0;
}

1723 1724
/*
 */
1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737
static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
{
	struct hda_spdif_out *spdif;
	bool non_pcm;

	mutex_lock(&codec->spdif_mutex);
	spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
	non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
	mutex_unlock(&codec->spdif_mutex);
	return non_pcm;
}


1738 1739 1740 1741 1742 1743 1744 1745 1746 1747
/*
 * HDMI callbacks
 */

static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
					   struct hda_codec *codec,
					   unsigned int stream_tag,
					   unsigned int format,
					   struct snd_pcm_substream *substream)
{
1748 1749
	hda_nid_t cvt_nid = hinfo->nid;
	struct hdmi_spec *spec = codec->spec;
1750
	int pin_idx = hinfo_to_pin_index(codec, hinfo);
1751 1752
	struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
	hda_nid_t pin_nid = per_pin->pin_nid;
1753
	bool non_pcm;
1754
	int pinctl;
1755 1756

	non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1757
	mutex_lock(&per_pin->lock);
1758 1759
	per_pin->channels = substream->runtime->channels;
	per_pin->setup = true;
1760

1761
	hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1762
	mutex_unlock(&per_pin->lock);
1763

1764 1765 1766 1767 1768 1769 1770 1771
	if (spec->dyn_pin_out) {
		pinctl = snd_hda_codec_read(codec, pin_nid, 0,
					    AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
		snd_hda_codec_write(codec, pin_nid, 0,
				    AC_VERB_SET_PIN_WIDGET_CONTROL,
				    pinctl | PIN_OUT);
	}

1772
	return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1773 1774
}

1775 1776 1777 1778 1779 1780 1781 1782
static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
					     struct hda_codec *codec,
					     struct snd_pcm_substream *substream)
{
	snd_hda_codec_cleanup_stream(codec, hinfo->nid);
	return 0;
}

1783 1784 1785
static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
			  struct hda_codec *codec,
			  struct snd_pcm_substream *substream)
1786 1787 1788 1789 1790
{
	struct hdmi_spec *spec = codec->spec;
	int cvt_idx, pin_idx;
	struct hdmi_spec_per_cvt *per_cvt;
	struct hdmi_spec_per_pin *per_pin;
1791
	int pinctl;
1792 1793

	if (hinfo->nid) {
1794
		cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1795 1796
		if (snd_BUG_ON(cvt_idx < 0))
			return -EINVAL;
1797
		per_cvt = get_cvt(spec, cvt_idx);
1798 1799 1800 1801 1802

		snd_BUG_ON(!per_cvt->assigned);
		per_cvt->assigned = 0;
		hinfo->nid = 0;

1803
		pin_idx = hinfo_to_pin_index(codec, hinfo);
1804 1805
		if (snd_BUG_ON(pin_idx < 0))
			return -EINVAL;
1806
		per_pin = get_pin(spec, pin_idx);
1807

1808 1809 1810 1811 1812 1813 1814 1815
		if (spec->dyn_pin_out) {
			pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
					AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
			snd_hda_codec_write(codec, per_pin->pin_nid, 0,
					    AC_VERB_SET_PIN_WIDGET_CONTROL,
					    pinctl & ~PIN_OUT);
		}

1816
		snd_hda_spdif_ctls_unassign(codec, pin_idx);
1817

1818
		mutex_lock(&per_pin->lock);
1819 1820
		per_pin->chmap_set = false;
		memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1821 1822 1823

		per_pin->setup = false;
		per_pin->channels = 0;
1824
		mutex_unlock(&per_pin->lock);
1825
	}
1826

1827 1828 1829 1830 1831
	return 0;
}

static const struct hda_pcm_ops generic_ops = {
	.open = hdmi_pcm_open,
1832
	.close = hdmi_pcm_close,
1833
	.prepare = generic_hdmi_playback_pcm_prepare,
1834
	.cleanup = generic_hdmi_playback_pcm_cleanup,
1835 1836
};

1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852
/*
 * ALSA API channel-map control callbacks
 */
static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
			       struct snd_ctl_elem_info *uinfo)
{
	struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
	struct hda_codec *codec = info->private_data;
	struct hdmi_spec *spec = codec->spec;
	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
	uinfo->count = spec->channels_max;
	uinfo->value.integer.min = 0;
	uinfo->value.integer.max = SNDRV_CHMAP_LAST;
	return 0;
}

1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880
static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
						  int channels)
{
	/* If the speaker allocation matches the channel count, it is OK.*/
	if (cap->channels != channels)
		return -1;

	/* all channels are remappable freely */
	return SNDRV_CTL_TLVT_CHMAP_VAR;
}

static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
					unsigned int *chmap, int channels)
{
	int count = 0;
	int c;

	for (c = 7; c >= 0; c--) {
		int spk = cap->speakers[c];
		if (!spk)
			continue;

		chmap[count++] = spk_to_chmap(spk);
	}

	WARN_ON(count != channels);
}

1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895
static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
			      unsigned int size, unsigned int __user *tlv)
{
	struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
	struct hda_codec *codec = info->private_data;
	struct hdmi_spec *spec = codec->spec;
	unsigned int __user *dst;
	int chs, count = 0;

	if (size < 8)
		return -ENOMEM;
	if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
		return -EFAULT;
	size -= 8;
	dst = tlv + 2;
1896
	for (chs = 2; chs <= spec->channels_max; chs++) {
1897
		int i;
1898 1899 1900 1901
		struct cea_channel_speaker_allocation *cap;
		cap = channel_allocations;
		for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
			int chs_bytes = chs * 4;
1902 1903 1904 1905
			int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
			unsigned int tlv_chmap[8];

			if (type < 0)
1906 1907 1908
				continue;
			if (size < 8)
				return -ENOMEM;
1909
			if (put_user(type, dst) ||
1910 1911 1912 1913 1914 1915 1916 1917 1918
			    put_user(chs_bytes, dst + 1))
				return -EFAULT;
			dst += 2;
			size -= 8;
			count += 8;
			if (size < chs_bytes)
				return -ENOMEM;
			size -= chs_bytes;
			count += chs_bytes;
1919 1920 1921 1922
			spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
			if (copy_to_user(dst, tlv_chmap, chs_bytes))
				return -EFAULT;
			dst += chs;
1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936
		}
	}
	if (put_user(count, tlv + 1))
		return -EFAULT;
	return 0;
}

static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
			      struct snd_ctl_elem_value *ucontrol)
{
	struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
	struct hda_codec *codec = info->private_data;
	struct hdmi_spec *spec = codec->spec;
	int pin_idx = kcontrol->private_value;
1937
	struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951
	int i;

	for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
		ucontrol->value.integer.value[i] = per_pin->chmap[i];
	return 0;
}

static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
			      struct snd_ctl_elem_value *ucontrol)
{
	struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
	struct hda_codec *codec = info->private_data;
	struct hdmi_spec *spec = codec->spec;
	int pin_idx = kcontrol->private_value;
1952
	struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1953 1954 1955
	unsigned int ctl_idx;
	struct snd_pcm_substream *substream;
	unsigned char chmap[8];
1956
	int i, err, ca, prepared = 0;
1957 1958 1959 1960

	ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
	substream = snd_pcm_chmap_substream(info, ctl_idx);
	if (!substream || !substream->runtime)
1961
		return 0; /* just for avoiding error from alsactl restore */
1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979
	switch (substream->runtime->status->state) {
	case SNDRV_PCM_STATE_OPEN:
	case SNDRV_PCM_STATE_SETUP:
		break;
	case SNDRV_PCM_STATE_PREPARED:
		prepared = 1;
		break;
	default:
		return -EBUSY;
	}
	memset(chmap, 0, sizeof(chmap));
	for (i = 0; i < ARRAY_SIZE(chmap); i++)
		chmap[i] = ucontrol->value.integer.value[i];
	if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
		return 0;
	ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
	if (ca < 0)
		return -EINVAL;
1980 1981 1982 1983 1984
	if (spec->ops.chmap_validate) {
		err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
		if (err)
			return err;
	}
1985
	mutex_lock(&per_pin->lock);
1986 1987 1988
	per_pin->chmap_set = true;
	memcpy(per_pin->chmap, chmap, sizeof(chmap));
	if (prepared)
1989
		hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1990
	mutex_unlock(&per_pin->lock);
1991 1992 1993 1994

	return 0;
}

1995 1996 1997
static int generic_hdmi_build_pcms(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
1998
	int pin_idx;
1999

2000 2001
	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
		struct hda_pcm *info;
2002
		struct hda_pcm_stream *pstr;
2003 2004 2005 2006 2007 2008 2009 2010
		struct hdmi_spec_per_pin *per_pin;

		per_pin = get_pin(spec, pin_idx);
		sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
		info = snd_array_new(&spec->pcm_rec);
		if (!info)
			return -ENOMEM;
		info->name = per_pin->pcm_name;
2011
		info->pcm_type = HDA_PCM_TYPE_HDMI;
2012
		info->own_chmap = true;
2013

2014
		pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2015 2016 2017
		pstr->substreams = 1;
		pstr->ops = generic_ops;
		/* other pstr fields are set in open */
2018 2019
	}

2020
	codec->num_pcms = spec->num_pins;
2021
	codec->pcm_info = spec->pcm_rec.list;
2022

2023 2024 2025
	return 0;
}

2026 2027
static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
{
2028
	char hdmi_str[32] = "HDMI/DP";
2029
	struct hdmi_spec *spec = codec->spec;
2030 2031
	struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
	int pcmdev = get_pcm_rec(spec, pin_idx)->device;
2032

2033 2034
	if (pcmdev > 0)
		sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2035 2036 2037
	if (!is_jack_detectable(codec, per_pin->pin_nid))
		strncat(hdmi_str, " Phantom",
			sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2038

2039
	return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2040 2041
}

2042 2043 2044 2045
static int generic_hdmi_build_controls(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
	int err;
2046
	int pin_idx;
2047

2048
	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2049
		struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2050 2051 2052 2053 2054

		err = generic_hdmi_build_jack(codec, pin_idx);
		if (err < 0)
			return err;

2055 2056 2057 2058
		err = snd_hda_create_dig_out_ctls(codec,
						  per_pin->pin_nid,
						  per_pin->mux_nids[0],
						  HDA_PCM_TYPE_HDMI);
2059 2060
		if (err < 0)
			return err;
2061
		snd_hda_spdif_ctls_unassign(codec, pin_idx);
2062 2063

		/* add control for ELD Bytes */
2064 2065
		err = hdmi_create_eld_ctl(codec, pin_idx,
					  get_pcm_rec(spec, pin_idx)->device);
2066 2067 2068

		if (err < 0)
			return err;
2069

2070
		hdmi_present_sense(per_pin, 0);
2071 2072
	}

2073 2074 2075 2076 2077
	/* add channel maps */
	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
		struct snd_pcm_chmap *chmap;
		struct snd_kcontrol *kctl;
		int i;
2078 2079 2080

		if (!codec->pcm_info[pin_idx].pcm)
			break;
2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096
		err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
					     SNDRV_PCM_STREAM_PLAYBACK,
					     NULL, 0, pin_idx, &chmap);
		if (err < 0)
			return err;
		/* override handlers */
		chmap->private_data = codec;
		kctl = chmap->kctl;
		for (i = 0; i < kctl->count; i++)
			kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
		kctl->info = hdmi_chmap_ctl_info;
		kctl->get = hdmi_chmap_ctl_get;
		kctl->put = hdmi_chmap_ctl_put;
		kctl->tlv.c = hdmi_chmap_ctl_tlv;
	}

2097 2098 2099
	return 0;
}

2100
static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2101 2102
{
	struct hdmi_spec *spec = codec->spec;
2103 2104 2105
	int pin_idx;

	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2106
		struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2107

W
Wu Fengguang 已提交
2108
		per_pin->codec = codec;
2109
		mutex_init(&per_pin->lock);
W
Wu Fengguang 已提交
2110
		INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2111
		eld_proc_new(per_pin, pin_idx);
2112
	}
2113 2114 2115 2116 2117 2118 2119 2120 2121
	return 0;
}

static int generic_hdmi_init(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
	int pin_idx;

	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2122
		struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2123 2124 2125
		hda_nid_t pin_nid = per_pin->pin_nid;

		hdmi_init_pin(codec, pin_nid);
2126 2127
		snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
			codec->jackpoll_interval > 0 ? jack_callback : NULL);
2128
	}
2129 2130 2131
	return 0;
}

2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145
static void hdmi_array_init(struct hdmi_spec *spec, int nums)
{
	snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
	snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
	snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
}

static void hdmi_array_free(struct hdmi_spec *spec)
{
	snd_array_free(&spec->pins);
	snd_array_free(&spec->cvts);
	snd_array_free(&spec->pcm_rec);
}

2146 2147 2148
static void generic_hdmi_free(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
2149 2150 2151
	int pin_idx;

	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2152
		struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2153

W
Wu Fengguang 已提交
2154
		cancel_delayed_work(&per_pin->work);
2155
		eld_proc_free(per_pin);
2156
	}
2157

W
Wu Fengguang 已提交
2158
	flush_workqueue(codec->bus->workq);
2159
	hdmi_array_free(spec);
2160 2161 2162
	kfree(spec);
}

2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180
#ifdef CONFIG_PM
static int generic_hdmi_resume(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
	int pin_idx;

	generic_hdmi_init(codec);
	snd_hda_codec_resume_amp(codec);
	snd_hda_codec_resume_cache(codec);

	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
		struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
		hdmi_present_sense(per_pin, 1);
	}
	return 0;
}
#endif

2181
static const struct hda_codec_ops generic_hdmi_patch_ops = {
2182 2183 2184 2185 2186
	.init			= generic_hdmi_init,
	.free			= generic_hdmi_free,
	.build_pcms		= generic_hdmi_build_pcms,
	.build_controls		= generic_hdmi_build_controls,
	.unsol_event		= hdmi_unsol_event,
2187 2188 2189
#ifdef CONFIG_PM
	.resume			= generic_hdmi_resume,
#endif
2190 2191
};

2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202
static const struct hdmi_ops generic_standard_hdmi_ops = {
	.pin_get_eld				= snd_hdmi_get_eld,
	.pin_get_slot_channel			= hdmi_pin_get_slot_channel,
	.pin_set_slot_channel			= hdmi_pin_set_slot_channel,
	.pin_setup_infoframe			= hdmi_pin_setup_infoframe,
	.pin_hbr_setup				= hdmi_pin_hbr_setup,
	.setup_stream				= hdmi_setup_stream,
	.chmap_cea_alloc_validate_get_type	= hdmi_chmap_cea_alloc_validate_get_type,
	.cea_alloc_to_tlv_chmap			= hdmi_cea_alloc_to_tlv_chmap,
};

2203

2204 2205 2206 2207 2208 2209
static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
					     hda_nid_t nid)
{
	struct hdmi_spec *spec = codec->spec;
	hda_nid_t conns[4];
	int nconns;
2210

2211 2212 2213
	nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
	if (nconns == spec->num_cvts &&
	    !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2214 2215
		return;

2216
	/* override pins connection list */
2217
	codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2218
	snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2219 2220
}

2221 2222 2223 2224 2225 2226 2227
#define INTEL_VENDOR_NID 0x08
#define INTEL_GET_VENDOR_VERB 0xf81
#define INTEL_SET_VENDOR_VERB 0x781
#define INTEL_EN_DP12			0x02 /* enable DP 1.2 features */
#define INTEL_EN_ALL_PIN_CVTS	0x01 /* enable 2nd & 3rd pins and convertors */

static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2228
					  bool update_tree)
2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242
{
	unsigned int vendor_param;

	vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
				INTEL_GET_VENDOR_VERB, 0);
	if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
		return;

	vendor_param |= INTEL_EN_ALL_PIN_CVTS;
	vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
				INTEL_SET_VENDOR_VERB, vendor_param);
	if (vendor_param == -1)
		return;

2243 2244
	if (update_tree)
		snd_hda_codec_update_widgets(codec);
2245 2246
}

2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261
static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
{
	unsigned int vendor_param;

	vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
				INTEL_GET_VENDOR_VERB, 0);
	if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
		return;

	/* enable DP1.2 mode */
	vendor_param |= INTEL_EN_DP12;
	snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
				INTEL_SET_VENDOR_VERB, vendor_param);
}

2262 2263 2264 2265 2266 2267 2268 2269 2270 2271
/* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
 * Otherwise you may get severe h/w communication errors.
 */
static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
				unsigned int power_state)
{
	if (power_state == AC_PWRST_D0) {
		intel_haswell_enable_all_pins(codec, false);
		intel_haswell_fixup_enable_dp12(codec);
	}
2272

2273 2274 2275
	snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
	snd_hda_codec_set_power_to_all(codec, fg, power_state);
}
2276

2277 2278 2279 2280 2281 2282 2283 2284
static int patch_generic_hdmi(struct hda_codec *codec)
{
	struct hdmi_spec *spec;

	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
	if (spec == NULL)
		return -ENOMEM;

2285
	spec->ops = generic_standard_hdmi_ops;
2286
	codec->spec = spec;
2287
	hdmi_array_init(spec, 4);
2288

2289
	if (is_haswell_plus(codec)) {
2290
		intel_haswell_enable_all_pins(codec, true);
2291
		intel_haswell_fixup_enable_dp12(codec);
2292
	}
2293

2294 2295 2296 2297
	if (is_haswell(codec) || is_valleyview(codec)) {
		codec->depop_delay = 0;
	}

2298 2299 2300 2301 2302 2303
	if (hdmi_parse_codec(codec) < 0) {
		codec->spec = NULL;
		kfree(spec);
		return -EINVAL;
	}
	codec->patch_ops = generic_hdmi_patch_ops;
2304
	if (is_haswell_plus(codec)) {
2305
		codec->patch_ops.set_power_state = haswell_set_power_state;
2306 2307
		codec->dp_mst = true;
	}
2308

2309
	generic_hdmi_init_per_pins(codec);
2310 2311 2312 2313 2314 2315

	init_channel_allocations();

	return 0;
}

2316 2317 2318 2319 2320 2321 2322
/*
 * Shared non-generic implementations
 */

static int simple_playback_build_pcms(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
2323
	struct hda_pcm *info;
2324 2325
	unsigned int chans;
	struct hda_pcm_stream *pstr;
2326
	struct hdmi_spec_per_cvt *per_cvt;
2327

2328 2329
	per_cvt = get_cvt(spec, 0);
	chans = get_wcaps(codec, per_cvt->cvt_nid);
2330
	chans = get_wcaps_channels(chans);
2331

2332 2333 2334 2335 2336
	info = snd_array_new(&spec->pcm_rec);
	if (!info)
		return -ENOMEM;
	info->name = get_pin(spec, 0)->pcm_name;
	sprintf(info->name, "HDMI 0");
2337 2338 2339
	info->pcm_type = HDA_PCM_TYPE_HDMI;
	pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
	*pstr = spec->pcm_playback;
2340
	pstr->nid = per_cvt->cvt_nid;
2341 2342
	if (pstr->channels_max <= 2 && chans && chans <= 16)
		pstr->channels_max = chans;
2343

2344 2345 2346
	codec->num_pcms = 1;
	codec->pcm_info = info;

2347 2348 2349
	return 0;
}

2350 2351 2352 2353
/* unsolicited event for jack sensing */
static void simple_hdmi_unsol_event(struct hda_codec *codec,
				    unsigned int res)
{
2354
	snd_hda_jack_set_dirty_all(codec);
2355 2356 2357 2358 2359 2360 2361 2362
	snd_hda_jack_report_sync(codec);
}

/* generic_hdmi_build_jack can be used for simple_hdmi, too,
 * as long as spec->pins[] is set correctly
 */
#define simple_hdmi_build_jack	generic_hdmi_build_jack

2363 2364 2365
static int simple_playback_build_controls(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
2366
	struct hdmi_spec_per_cvt *per_cvt;
2367 2368
	int err;

2369
	per_cvt = get_cvt(spec, 0);
2370 2371 2372
	err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
					  per_cvt->cvt_nid,
					  HDA_PCM_TYPE_HDMI);
2373 2374 2375
	if (err < 0)
		return err;
	return simple_hdmi_build_jack(codec, 0);
2376 2377
}

2378 2379 2380
static int simple_playback_init(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
2381 2382
	struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
	hda_nid_t pin = per_pin->pin_nid;
2383 2384 2385 2386 2387 2388 2389 2390

	snd_hda_codec_write(codec, pin, 0,
			    AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
	/* some codecs require to unmute the pin */
	if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
		snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
				    AMP_OUT_UNMUTE);
	snd_hda_jack_detect_enable(codec, pin, pin);
2391 2392 2393
	return 0;
}

2394 2395 2396 2397
static void simple_playback_free(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;

2398
	hdmi_array_free(spec);
2399 2400 2401
	kfree(spec);
}

2402 2403 2404 2405 2406 2407 2408 2409 2410 2411 2412 2413
/*
 * Nvidia specific implementations
 */

#define Nv_VERB_SET_Channel_Allocation          0xF79
#define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
#define Nv_VERB_SET_Audio_Protection_On         0xF98
#define Nv_VERB_SET_Audio_Protection_Off        0xF99

#define nvhdmi_master_con_nid_7x	0x04
#define nvhdmi_master_pin_nid_7x	0x05

2414
static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2415 2416 2417 2418
	/*front, rear, clfe, rear_surr */
	0x6, 0x8, 0xa, 0xc,
};

2419 2420 2421 2422 2423 2424 2425 2426 2427
static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
	/* set audio protect on */
	{ 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
	/* enable digital output on pin widget */
	{ 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
	{} /* terminator */
};

static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2428 2429 2430 2431 2432 2433 2434 2435 2436 2437 2438 2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454
	/* set audio protect on */
	{ 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
	/* enable digital output on pin widget */
	{ 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
	{ 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
	{ 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
	{ 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
	{ 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
	{} /* terminator */
};

#ifdef LIMITED_RATE_FMT_SUPPORT
/* support only the safe format and rate */
#define SUPPORTED_RATES		SNDRV_PCM_RATE_48000
#define SUPPORTED_MAXBPS	16
#define SUPPORTED_FORMATS	SNDRV_PCM_FMTBIT_S16_LE
#else
/* support all rates and formats */
#define SUPPORTED_RATES \
	(SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
	SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
	 SNDRV_PCM_RATE_192000)
#define SUPPORTED_MAXBPS	24
#define SUPPORTED_FORMATS \
	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
#endif

2455 2456 2457 2458 2459 2460 2461
static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
{
	snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
	return 0;
}

static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2462
{
2463
	snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2464 2465 2466
	return 0;
}

2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486
static unsigned int channels_2_6_8[] = {
	2, 6, 8
};

static unsigned int channels_2_8[] = {
	2, 8
};

static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
	.count = ARRAY_SIZE(channels_2_6_8),
	.list = channels_2_6_8,
	.mask = 0,
};

static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
	.count = ARRAY_SIZE(channels_2_8),
	.list = channels_2_8,
	.mask = 0,
};

2487 2488 2489 2490 2491
static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
				    struct hda_codec *codec,
				    struct snd_pcm_substream *substream)
{
	struct hdmi_spec *spec = codec->spec;
2492 2493 2494 2495 2496 2497 2498 2499 2500 2501 2502 2503 2504 2505 2506 2507 2508 2509 2510 2511
	struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;

	switch (codec->preset->id) {
	case 0x10de0002:
	case 0x10de0003:
	case 0x10de0005:
	case 0x10de0006:
		hw_constraints_channels = &hw_constraints_2_8_channels;
		break;
	case 0x10de0007:
		hw_constraints_channels = &hw_constraints_2_6_8_channels;
		break;
	default:
		break;
	}

	if (hw_constraints_channels != NULL) {
		snd_pcm_hw_constraint_list(substream->runtime, 0,
				SNDRV_PCM_HW_PARAM_CHANNELS,
				hw_constraints_channels);
2512 2513 2514
	} else {
		snd_pcm_hw_constraint_step(substream->runtime, 0,
					   SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2515 2516
	}

2517 2518 2519 2520 2521 2522 2523 2524 2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535 2536 2537 2538
	return snd_hda_multi_out_dig_open(codec, &spec->multiout);
}

static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
				     struct hda_codec *codec,
				     struct snd_pcm_substream *substream)
{
	struct hdmi_spec *spec = codec->spec;
	return snd_hda_multi_out_dig_close(codec, &spec->multiout);
}

static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
				       struct hda_codec *codec,
				       unsigned int stream_tag,
				       unsigned int format,
				       struct snd_pcm_substream *substream)
{
	struct hdmi_spec *spec = codec->spec;
	return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
					     stream_tag, format, substream);
}

2539 2540 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 2552 2553 2554
static const struct hda_pcm_stream simple_pcm_playback = {
	.substreams = 1,
	.channels_min = 2,
	.channels_max = 2,
	.ops = {
		.open = simple_playback_pcm_open,
		.close = simple_playback_pcm_close,
		.prepare = simple_playback_pcm_prepare
	},
};

static const struct hda_codec_ops simple_hdmi_patch_ops = {
	.build_controls = simple_playback_build_controls,
	.build_pcms = simple_playback_build_pcms,
	.init = simple_playback_init,
	.free = simple_playback_free,
2555
	.unsol_event = simple_hdmi_unsol_event,
2556 2557 2558 2559 2560 2561
};

static int patch_simple_hdmi(struct hda_codec *codec,
			     hda_nid_t cvt_nid, hda_nid_t pin_nid)
{
	struct hdmi_spec *spec;
2562 2563
	struct hdmi_spec_per_cvt *per_cvt;
	struct hdmi_spec_per_pin *per_pin;
2564 2565 2566 2567 2568 2569

	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
	if (!spec)
		return -ENOMEM;

	codec->spec = spec;
2570
	hdmi_array_init(spec, 1);
2571 2572 2573 2574 2575 2576

	spec->multiout.num_dacs = 0;  /* no analog */
	spec->multiout.max_channels = 2;
	spec->multiout.dig_out_nid = cvt_nid;
	spec->num_cvts = 1;
	spec->num_pins = 1;
2577 2578 2579 2580 2581 2582 2583 2584
	per_pin = snd_array_new(&spec->pins);
	per_cvt = snd_array_new(&spec->cvts);
	if (!per_pin || !per_cvt) {
		simple_playback_free(codec);
		return -ENOMEM;
	}
	per_cvt->cvt_nid = cvt_nid;
	per_pin->pin_nid = pin_nid;
2585 2586 2587 2588 2589 2590 2591
	spec->pcm_playback = simple_pcm_playback;

	codec->patch_ops = simple_hdmi_patch_ops;

	return 0;
}

2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624
static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
						    int channels)
{
	unsigned int chanmask;
	int chan = channels ? (channels - 1) : 1;

	switch (channels) {
	default:
	case 0:
	case 2:
		chanmask = 0x00;
		break;
	case 4:
		chanmask = 0x08;
		break;
	case 6:
		chanmask = 0x0b;
		break;
	case 8:
		chanmask = 0x13;
		break;
	}

	/* Set the audio infoframe channel allocation and checksum fields.  The
	 * channel count is computed implicitly by the hardware. */
	snd_hda_codec_write(codec, 0x1, 0,
			Nv_VERB_SET_Channel_Allocation, chanmask);

	snd_hda_codec_write(codec, 0x1, 0,
			Nv_VERB_SET_Info_Frame_Checksum,
			(0x71 - chan - chanmask));
}

2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641 2642
static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
				   struct hda_codec *codec,
				   struct snd_pcm_substream *substream)
{
	struct hdmi_spec *spec = codec->spec;
	int i;

	snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
			0, AC_VERB_SET_CHANNEL_STREAMID, 0);
	for (i = 0; i < 4; i++) {
		/* set the stream id */
		snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
				AC_VERB_SET_CHANNEL_STREAMID, 0);
		/* set the stream format */
		snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
				AC_VERB_SET_STREAM_FORMAT, 0);
	}

2643 2644 2645 2646
	/* The audio hardware sends a channel count of 0x7 (8ch) when all the
	 * streams are disabled. */
	nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);

2647 2648 2649 2650 2651 2652 2653 2654 2655 2656
	return snd_hda_multi_out_dig_close(codec, &spec->multiout);
}

static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
				     struct hda_codec *codec,
				     unsigned int stream_tag,
				     unsigned int format,
				     struct snd_pcm_substream *substream)
{
	int chs;
T
Takashi Iwai 已提交
2657
	unsigned int dataDCC2, channel_id;
2658
	int i;
2659
	struct hdmi_spec *spec = codec->spec;
2660
	struct hda_spdif_out *spdif;
2661
	struct hdmi_spec_per_cvt *per_cvt;
2662 2663

	mutex_lock(&codec->spdif_mutex);
2664 2665
	per_cvt = get_cvt(spec, 0);
	spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2666 2667 2668 2669 2670 2671

	chs = substream->runtime->channels;

	dataDCC2 = 0x2;

	/* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2672
	if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2673 2674 2675 2676
		snd_hda_codec_write(codec,
				nvhdmi_master_con_nid_7x,
				0,
				AC_VERB_SET_DIGI_CONVERT_1,
2677
				spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2678 2679 2680 2681 2682 2683 2684 2685 2686 2687 2688

	/* set the stream id */
	snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
			AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);

	/* set the stream format */
	snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
			AC_VERB_SET_STREAM_FORMAT, format);

	/* turn on again (if needed) */
	/* enable and set the channel status audio/data flag */
2689
	if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2690 2691 2692 2693
		snd_hda_codec_write(codec,
				nvhdmi_master_con_nid_7x,
				0,
				AC_VERB_SET_DIGI_CONVERT_1,
2694
				spdif->ctls & 0xff);
2695 2696 2697 2698 2699 2700 2701 2702 2703 2704 2705 2706 2707 2708 2709 2710
		snd_hda_codec_write(codec,
				nvhdmi_master_con_nid_7x,
				0,
				AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
	}

	for (i = 0; i < 4; i++) {
		if (chs == 2)
			channel_id = 0;
		else
			channel_id = i * 2;

		/* turn off SPDIF once;
		 *otherwise the IEC958 bits won't be updated
		 */
		if (codec->spdif_status_reset &&
2711
		(spdif->ctls & AC_DIG1_ENABLE))
2712 2713 2714 2715
			snd_hda_codec_write(codec,
				nvhdmi_con_nids_7x[i],
				0,
				AC_VERB_SET_DIGI_CONVERT_1,
2716
				spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2717 2718 2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729 2730 2731
		/* set the stream id */
		snd_hda_codec_write(codec,
				nvhdmi_con_nids_7x[i],
				0,
				AC_VERB_SET_CHANNEL_STREAMID,
				(stream_tag << 4) | channel_id);
		/* set the stream format */
		snd_hda_codec_write(codec,
				nvhdmi_con_nids_7x[i],
				0,
				AC_VERB_SET_STREAM_FORMAT,
				format);
		/* turn on again (if needed) */
		/* enable and set the channel status audio/data flag */
		if (codec->spdif_status_reset &&
2732
		(spdif->ctls & AC_DIG1_ENABLE)) {
2733 2734 2735 2736
			snd_hda_codec_write(codec,
					nvhdmi_con_nids_7x[i],
					0,
					AC_VERB_SET_DIGI_CONVERT_1,
2737
					spdif->ctls & 0xff);
2738 2739 2740 2741 2742 2743 2744
			snd_hda_codec_write(codec,
					nvhdmi_con_nids_7x[i],
					0,
					AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
		}
	}

2745
	nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2746 2747 2748 2749 2750

	mutex_unlock(&codec->spdif_mutex);
	return 0;
}

2751
static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2752 2753 2754 2755 2756 2757 2758 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768
	.substreams = 1,
	.channels_min = 2,
	.channels_max = 8,
	.nid = nvhdmi_master_con_nid_7x,
	.rates = SUPPORTED_RATES,
	.maxbps = SUPPORTED_MAXBPS,
	.formats = SUPPORTED_FORMATS,
	.ops = {
		.open = simple_playback_pcm_open,
		.close = nvhdmi_8ch_7x_pcm_close,
		.prepare = nvhdmi_8ch_7x_pcm_prepare
	},
};

static int patch_nvhdmi_2ch(struct hda_codec *codec)
{
	struct hdmi_spec *spec;
2769 2770 2771 2772
	int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
				    nvhdmi_master_pin_nid_7x);
	if (err < 0)
		return err;
2773

2774
	codec->patch_ops.init = nvhdmi_7x_init_2ch;
2775 2776 2777 2778 2779
	/* override the PCM rates, etc, as the codec doesn't give full list */
	spec = codec->spec;
	spec->pcm_playback.rates = SUPPORTED_RATES;
	spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
	spec->pcm_playback.formats = SUPPORTED_FORMATS;
2780 2781 2782
	return 0;
}

2783 2784 2785 2786
static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
	int err = simple_playback_build_pcms(codec);
2787 2788 2789 2790
	if (!err) {
		struct hda_pcm *info = get_pcm_rec(spec, 0);
		info->own_chmap = true;
	}
2791 2792 2793 2794 2795 2796
	return err;
}

static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
{
	struct hdmi_spec *spec = codec->spec;
2797
	struct hda_pcm *info;
2798 2799 2800 2801 2802 2803 2804 2805
	struct snd_pcm_chmap *chmap;
	int err;

	err = simple_playback_build_controls(codec);
	if (err < 0)
		return err;

	/* add channel maps */
2806 2807
	info = get_pcm_rec(spec, 0);
	err = snd_pcm_add_chmap_ctls(info->pcm,
2808 2809 2810 2811 2812 2813 2814 2815 2816 2817 2818 2819 2820 2821 2822 2823 2824
				     SNDRV_PCM_STREAM_PLAYBACK,
				     snd_pcm_alt_chmaps, 8, 0, &chmap);
	if (err < 0)
		return err;
	switch (codec->preset->id) {
	case 0x10de0002:
	case 0x10de0003:
	case 0x10de0005:
	case 0x10de0006:
		chmap->channel_mask = (1U << 2) | (1U << 8);
		break;
	case 0x10de0007:
		chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
	}
	return 0;
}

2825 2826 2827 2828 2829 2830 2831 2832
static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
{
	struct hdmi_spec *spec;
	int err = patch_nvhdmi_2ch(codec);
	if (err < 0)
		return err;
	spec = codec->spec;
	spec->multiout.max_channels = 8;
2833
	spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2834
	codec->patch_ops.init = nvhdmi_7x_init_8ch;
2835 2836
	codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
	codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2837 2838 2839 2840 2841

	/* Initialize the audio infoframe channel mask and checksum to something
	 * valid */
	nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);

2842 2843 2844
	return 0;
}

2845 2846 2847 2848 2849 2850 2851 2852 2853 2854 2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869 2870 2871 2872 2873 2874 2875 2876
/*
 * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
 * - 0x10de0015
 * - 0x10de0040
 */
static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
						    int channels)
{
	if (cap->ca_index == 0x00 && channels == 2)
		return SNDRV_CTL_TLVT_CHMAP_FIXED;

	return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
}

static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
{
	if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
		return -EINVAL;

	return 0;
}

static int patch_nvhdmi(struct hda_codec *codec)
{
	struct hdmi_spec *spec;
	int err;

	err = patch_generic_hdmi(codec);
	if (err)
		return err;

	spec = codec->spec;
2877
	spec->dyn_pin_out = true;
2878 2879 2880 2881 2882 2883 2884 2885

	spec->ops.chmap_cea_alloc_validate_get_type =
		nvhdmi_chmap_cea_alloc_validate_get_type;
	spec->ops.chmap_validate = nvhdmi_chmap_validate;

	return 0;
}

2886
/*
2887
 * ATI/AMD-specific implementations
2888 2889
 */

2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900
#define is_amdhdmi_rev3_or_later(codec) \
	((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
#define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)

/* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
#define ATI_VERB_SET_CHANNEL_ALLOCATION	0x771
#define ATI_VERB_SET_DOWNMIX_INFO	0x772
#define ATI_VERB_SET_MULTICHANNEL_01	0x777
#define ATI_VERB_SET_MULTICHANNEL_23	0x778
#define ATI_VERB_SET_MULTICHANNEL_45	0x779
#define ATI_VERB_SET_MULTICHANNEL_67	0x77a
2901
#define ATI_VERB_SET_HBR_CONTROL	0x77c
2902 2903 2904 2905 2906 2907 2908 2909 2910 2911 2912
#define ATI_VERB_SET_MULTICHANNEL_1	0x785
#define ATI_VERB_SET_MULTICHANNEL_3	0x786
#define ATI_VERB_SET_MULTICHANNEL_5	0x787
#define ATI_VERB_SET_MULTICHANNEL_7	0x788
#define ATI_VERB_SET_MULTICHANNEL_MODE	0x789
#define ATI_VERB_GET_CHANNEL_ALLOCATION	0xf71
#define ATI_VERB_GET_DOWNMIX_INFO	0xf72
#define ATI_VERB_GET_MULTICHANNEL_01	0xf77
#define ATI_VERB_GET_MULTICHANNEL_23	0xf78
#define ATI_VERB_GET_MULTICHANNEL_45	0xf79
#define ATI_VERB_GET_MULTICHANNEL_67	0xf7a
2913
#define ATI_VERB_GET_HBR_CONTROL	0xf7c
2914 2915 2916 2917 2918 2919
#define ATI_VERB_GET_MULTICHANNEL_1	0xf85
#define ATI_VERB_GET_MULTICHANNEL_3	0xf86
#define ATI_VERB_GET_MULTICHANNEL_5	0xf87
#define ATI_VERB_GET_MULTICHANNEL_7	0xf88
#define ATI_VERB_GET_MULTICHANNEL_MODE	0xf89

2920 2921 2922 2923
/* AMD specific HDA cvt verbs */
#define ATI_VERB_SET_RAMP_RATE		0x770
#define ATI_VERB_GET_RAMP_RATE		0xf70

2924 2925 2926 2927 2928
#define ATI_OUT_ENABLE 0x1

#define ATI_MULTICHANNEL_MODE_PAIRED	0
#define ATI_MULTICHANNEL_MODE_SINGLE	1

2929 2930 2931
#define ATI_HBR_CAPABLE 0x01
#define ATI_HBR_ENABLE 0x10

2932 2933 2934 2935 2936 2937 2938 2939
static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
			   unsigned char *buf, int *eld_size)
{
	/* call hda_eld.c ATI/AMD-specific function */
	return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
				    is_amdhdmi_rev3_or_later(codec));
}

2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970 2971 2972 2973 2974 2975 2976 2977 2978 2979 2980 2981 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 2994 2995 2996 2997 2998 2999 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012 3013 3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 3056 3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072
static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
					int active_channels, int conn_type)
{
	snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
}

static int atihdmi_paired_swap_fc_lfe(int pos)
{
	/*
	 * ATI/AMD have automatic FC/LFE swap built-in
	 * when in pairwise mapping mode.
	 */

	switch (pos) {
		/* see channel_allocations[].speakers[] */
		case 2: return 3;
		case 3: return 2;
		default: break;
	}

	return pos;
}

static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
{
	struct cea_channel_speaker_allocation *cap;
	int i, j;

	/* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */

	cap = &channel_allocations[get_channel_allocation_order(ca)];
	for (i = 0; i < chs; ++i) {
		int mask = to_spk_mask(map[i]);
		bool ok = false;
		bool companion_ok = false;

		if (!mask)
			continue;

		for (j = 0 + i % 2; j < 8; j += 2) {
			int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
			if (cap->speakers[chan_idx] == mask) {
				/* channel is in a supported position */
				ok = true;

				if (i % 2 == 0 && i + 1 < chs) {
					/* even channel, check the odd companion */
					int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
					int comp_mask_req = to_spk_mask(map[i+1]);
					int comp_mask_act = cap->speakers[comp_chan_idx];

					if (comp_mask_req == comp_mask_act)
						companion_ok = true;
					else
						return -EINVAL;
				}
				break;
			}
		}

		if (!ok)
			return -EINVAL;

		if (companion_ok)
			i++; /* companion channel already checked */
	}

	return 0;
}

static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
					int hdmi_slot, int stream_channel)
{
	int verb;
	int ati_channel_setup = 0;

	if (hdmi_slot > 7)
		return -EINVAL;

	if (!has_amd_full_remap_support(codec)) {
		hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);

		/* In case this is an odd slot but without stream channel, do not
		 * disable the slot since the corresponding even slot could have a
		 * channel. In case neither have a channel, the slot pair will be
		 * disabled when this function is called for the even slot. */
		if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
			return 0;

		hdmi_slot -= hdmi_slot % 2;

		if (stream_channel != 0xf)
			stream_channel -= stream_channel % 2;
	}

	verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;

	/* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */

	if (stream_channel != 0xf)
		ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;

	return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
}

static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
					int asp_slot)
{
	bool was_odd = false;
	int ati_asp_slot = asp_slot;
	int verb;
	int ati_channel_setup;

	if (asp_slot > 7)
		return -EINVAL;

	if (!has_amd_full_remap_support(codec)) {
		ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
		if (ati_asp_slot % 2 != 0) {
			ati_asp_slot -= 1;
			was_odd = true;
		}
	}

	verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;

	ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);

	if (!(ati_channel_setup & ATI_OUT_ENABLE))
		return 0xf;

	return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
}
3073

3074 3075 3076 3077 3078 3079 3080 3081 3082 3083 3084 3085 3086 3087 3088 3089 3090 3091 3092 3093 3094 3095 3096 3097 3098 3099 3100 3101 3102 3103 3104 3105 3106 3107 3108 3109 3110 3111 3112 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125
static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
							    int channels)
{
	int c;

	/*
	 * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
	 * we need to take that into account (a single channel may take 2
	 * channel slots if we need to carry a silent channel next to it).
	 * On Rev3+ AMD codecs this function is not used.
	 */
	int chanpairs = 0;

	/* We only produce even-numbered channel count TLVs */
	if ((channels % 2) != 0)
		return -1;

	for (c = 0; c < 7; c += 2) {
		if (cap->speakers[c] || cap->speakers[c+1])
			chanpairs++;
	}

	if (chanpairs * 2 != channels)
		return -1;

	return SNDRV_CTL_TLVT_CHMAP_PAIRED;
}

static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
						  unsigned int *chmap, int channels)
{
	/* produce paired maps for pre-rev3 ATI/AMD codecs */
	int count = 0;
	int c;

	for (c = 7; c >= 0; c--) {
		int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
		int spk = cap->speakers[chan];
		if (!spk) {
			/* add N/A channel if the companion channel is occupied */
			if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
				chmap[count++] = SNDRV_CHMAP_NA;

			continue;
		}

		chmap[count++] = spk_to_chmap(spk);
	}

	WARN_ON(count != channels);
}

3126 3127 3128 3129 3130 3131
static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
				 bool hbr)
{
	int hbr_ctl, hbr_ctl_new;

	hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3132
	if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3133 3134 3135 3136 3137
		if (hbr)
			hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
		else
			hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;

3138 3139
		codec_dbg(codec,
			  "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3140 3141 3142 3143 3144 3145 3146 3147 3148 3149 3150 3151 3152 3153 3154
				pin_nid,
				hbr_ctl == hbr_ctl_new ? "" : "new-",
				hbr_ctl_new);

		if (hbr_ctl != hbr_ctl_new)
			snd_hda_codec_write(codec, pin_nid, 0,
						ATI_VERB_SET_HBR_CONTROL,
						hbr_ctl_new);

	} else if (hbr)
		return -EINVAL;

	return 0;
}

3155 3156 3157 3158 3159 3160 3161 3162 3163 3164 3165 3166 3167 3168 3169 3170 3171
static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
				hda_nid_t pin_nid, u32 stream_tag, int format)
{

	if (is_amdhdmi_rev3_or_later(codec)) {
		int ramp_rate = 180; /* default as per AMD spec */
		/* disable ramp-up/down for non-pcm as per AMD spec */
		if (format & AC_FMT_TYPE_NON_PCM)
			ramp_rate = 0;

		snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
	}

	return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
}


3172
static int atihdmi_init(struct hda_codec *codec)
3173 3174
{
	struct hdmi_spec *spec = codec->spec;
3175
	int pin_idx, err;
3176

3177 3178 3179
	err = generic_hdmi_init(codec);

	if (err)
3180
		return err;
3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192

	for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
		struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);

		/* make sure downmix information in infoframe is zero */
		snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);

		/* enable channel-wise remap mode if supported */
		if (has_amd_full_remap_support(codec))
			snd_hda_codec_write(codec, per_pin->pin_nid, 0,
					    ATI_VERB_SET_MULTICHANNEL_MODE,
					    ATI_MULTICHANNEL_MODE_SINGLE);
3193
	}
3194

3195 3196 3197 3198 3199 3200
	return 0;
}

static int patch_atihdmi(struct hda_codec *codec)
{
	struct hdmi_spec *spec;
3201 3202 3203 3204 3205 3206
	struct hdmi_spec_per_cvt *per_cvt;
	int err, cvt_idx;

	err = patch_generic_hdmi(codec);

	if (err)
3207
		return err;
3208 3209 3210

	codec->patch_ops.init = atihdmi_init;

3211
	spec = codec->spec;
3212

3213
	spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3214 3215 3216
	spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
	spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
	spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3217
	spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3218
	spec->ops.setup_stream = atihdmi_setup_stream;
3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232 3233 3234 3235 3236 3237 3238

	if (!has_amd_full_remap_support(codec)) {
		/* override to ATI/AMD-specific versions with pairwise mapping */
		spec->ops.chmap_cea_alloc_validate_get_type =
			atihdmi_paired_chmap_cea_alloc_validate_get_type;
		spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
		spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
	}

	/* ATI/AMD converters do not advertise all of their capabilities */
	for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
		per_cvt = get_cvt(spec, cvt_idx);
		per_cvt->channels_max = max(per_cvt->channels_max, 8u);
		per_cvt->rates |= SUPPORTED_RATES;
		per_cvt->formats |= SUPPORTED_FORMATS;
		per_cvt->maxbps = max(per_cvt->maxbps, 24u);
	}

	spec->channels_max = max(spec->channels_max, 8u);

3239 3240 3241
	return 0;
}

3242 3243 3244 3245 3246 3247
/* VIA HDMI Implementation */
#define VIAHDMI_CVT_NID	0x02	/* audio converter1 */
#define VIAHDMI_PIN_NID	0x03	/* HDMI output pin1 */

static int patch_via_hdmi(struct hda_codec *codec)
{
3248
	return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3249
}
3250

3251 3252 3253 3254 3255 3256 3257
/*
 * called from hda_codec.c for generic HDMI support
 */
int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
{
	return patch_generic_hdmi(codec);
}
3258
EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3259

3260 3261 3262
/*
 * patch entries
 */
3263
static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3264 3265 3266
{ .id = 0x1002793c, .name = "RS600 HDMI",	.patch = patch_atihdmi },
{ .id = 0x10027919, .name = "RS600 HDMI",	.patch = patch_atihdmi },
{ .id = 0x1002791a, .name = "RS690/780 HDMI",	.patch = patch_atihdmi },
3267
{ .id = 0x1002aa01, .name = "R6xx HDMI",	.patch = patch_atihdmi },
3268 3269 3270 3271 3272 3273 3274 3275
{ .id = 0x10951390, .name = "SiI1390 HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x10951392, .name = "SiI1392 HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x17e80047, .name = "Chrontel HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x10de0002, .name = "MCP77/78 HDMI",	.patch = patch_nvhdmi_8ch_7x },
{ .id = 0x10de0003, .name = "MCP77/78 HDMI",	.patch = patch_nvhdmi_8ch_7x },
{ .id = 0x10de0005, .name = "MCP77/78 HDMI",	.patch = patch_nvhdmi_8ch_7x },
{ .id = 0x10de0006, .name = "MCP77/78 HDMI",	.patch = patch_nvhdmi_8ch_7x },
{ .id = 0x10de0007, .name = "MCP79/7A HDMI",	.patch = patch_nvhdmi_8ch_7x },
3276 3277 3278 3279 3280 3281 3282 3283 3284 3285 3286
{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de000c, .name = "MCP89 HDMI",	.patch = patch_nvhdmi },
{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0015, .name = "GPU 15 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0016, .name = "GPU 16 HDMI/DP",	.patch = patch_nvhdmi },
3287
/* 17 is known to be absent */
3288 3289 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299
{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0051, .name = "GPU 51 HDMI/DP",	.patch = patch_nvhdmi },
{ .id = 0x10de0060, .name = "GPU 60 HDMI/DP",	.patch = patch_nvhdmi },
3300 3301
{ .id = 0x10de0067, .name = "MCP67 HDMI",	.patch = patch_nvhdmi_2ch },
{ .id = 0x10de8001, .name = "MCP73 HDMI",	.patch = patch_nvhdmi_2ch },
3302 3303 3304 3305
{ .id = 0x11069f80, .name = "VX900 HDMI/DP",	.patch = patch_via_hdmi },
{ .id = 0x11069f81, .name = "VX900 HDMI/DP",	.patch = patch_via_hdmi },
{ .id = 0x11069f84, .name = "VX11 HDMI/DP",	.patch = patch_generic_hdmi },
{ .id = 0x11069f85, .name = "VX11 HDMI/DP",	.patch = patch_generic_hdmi },
3306 3307 3308 3309 3310 3311
{ .id = 0x80860054, .name = "IbexPeak HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x80862801, .name = "Bearlake HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x80862802, .name = "Cantiga HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x80862803, .name = "Eaglelake HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x80862804, .name = "IbexPeak HDMI",	.patch = patch_generic_hdmi },
{ .id = 0x80862805, .name = "CougarPoint HDMI",	.patch = patch_generic_hdmi },
3312
{ .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3313
{ .id = 0x80862807, .name = "Haswell HDMI",	.patch = patch_generic_hdmi },
3314
{ .id = 0x80862808, .name = "Broadwell HDMI",	.patch = patch_generic_hdmi },
3315
{ .id = 0x80862880, .name = "CedarTrail HDMI",	.patch = patch_generic_hdmi },
3316
{ .id = 0x80862882, .name = "Valleyview2 HDMI",	.patch = patch_generic_hdmi },
3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330 3331 3332 3333 3334 3335 3336 3337 3338 3339 3340
{ .id = 0x808629fb, .name = "Crestline HDMI",	.patch = patch_generic_hdmi },
{} /* terminator */
};

MODULE_ALIAS("snd-hda-codec-id:1002793c");
MODULE_ALIAS("snd-hda-codec-id:10027919");
MODULE_ALIAS("snd-hda-codec-id:1002791a");
MODULE_ALIAS("snd-hda-codec-id:1002aa01");
MODULE_ALIAS("snd-hda-codec-id:10951390");
MODULE_ALIAS("snd-hda-codec-id:10951392");
MODULE_ALIAS("snd-hda-codec-id:10de0002");
MODULE_ALIAS("snd-hda-codec-id:10de0003");
MODULE_ALIAS("snd-hda-codec-id:10de0005");
MODULE_ALIAS("snd-hda-codec-id:10de0006");
MODULE_ALIAS("snd-hda-codec-id:10de0007");
MODULE_ALIAS("snd-hda-codec-id:10de000a");
MODULE_ALIAS("snd-hda-codec-id:10de000b");
MODULE_ALIAS("snd-hda-codec-id:10de000c");
MODULE_ALIAS("snd-hda-codec-id:10de000d");
MODULE_ALIAS("snd-hda-codec-id:10de0010");
MODULE_ALIAS("snd-hda-codec-id:10de0011");
MODULE_ALIAS("snd-hda-codec-id:10de0012");
MODULE_ALIAS("snd-hda-codec-id:10de0013");
MODULE_ALIAS("snd-hda-codec-id:10de0014");
3341 3342
MODULE_ALIAS("snd-hda-codec-id:10de0015");
MODULE_ALIAS("snd-hda-codec-id:10de0016");
3343 3344 3345 3346 3347 3348 3349 3350 3351 3352
MODULE_ALIAS("snd-hda-codec-id:10de0018");
MODULE_ALIAS("snd-hda-codec-id:10de0019");
MODULE_ALIAS("snd-hda-codec-id:10de001a");
MODULE_ALIAS("snd-hda-codec-id:10de001b");
MODULE_ALIAS("snd-hda-codec-id:10de001c");
MODULE_ALIAS("snd-hda-codec-id:10de0040");
MODULE_ALIAS("snd-hda-codec-id:10de0041");
MODULE_ALIAS("snd-hda-codec-id:10de0042");
MODULE_ALIAS("snd-hda-codec-id:10de0043");
MODULE_ALIAS("snd-hda-codec-id:10de0044");
3353
MODULE_ALIAS("snd-hda-codec-id:10de0051");
3354
MODULE_ALIAS("snd-hda-codec-id:10de0060");
3355 3356
MODULE_ALIAS("snd-hda-codec-id:10de0067");
MODULE_ALIAS("snd-hda-codec-id:10de8001");
3357 3358 3359 3360
MODULE_ALIAS("snd-hda-codec-id:11069f80");
MODULE_ALIAS("snd-hda-codec-id:11069f81");
MODULE_ALIAS("snd-hda-codec-id:11069f84");
MODULE_ALIAS("snd-hda-codec-id:11069f85");
3361 3362 3363 3364 3365 3366 3367
MODULE_ALIAS("snd-hda-codec-id:17e80047");
MODULE_ALIAS("snd-hda-codec-id:80860054");
MODULE_ALIAS("snd-hda-codec-id:80862801");
MODULE_ALIAS("snd-hda-codec-id:80862802");
MODULE_ALIAS("snd-hda-codec-id:80862803");
MODULE_ALIAS("snd-hda-codec-id:80862804");
MODULE_ALIAS("snd-hda-codec-id:80862805");
3368
MODULE_ALIAS("snd-hda-codec-id:80862806");
3369
MODULE_ALIAS("snd-hda-codec-id:80862807");
3370
MODULE_ALIAS("snd-hda-codec-id:80862808");
3371
MODULE_ALIAS("snd-hda-codec-id:80862880");
3372
MODULE_ALIAS("snd-hda-codec-id:80862882");
3373 3374 3375 3376 3377 3378 3379 3380 3381 3382 3383 3384 3385 3386 3387 3388 3389 3390 3391 3392 3393 3394 3395 3396 3397
MODULE_ALIAS("snd-hda-codec-id:808629fb");

MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("HDMI HD-audio codec");
MODULE_ALIAS("snd-hda-codec-intelhdmi");
MODULE_ALIAS("snd-hda-codec-nvhdmi");
MODULE_ALIAS("snd-hda-codec-atihdmi");

static struct hda_codec_preset_list intel_list = {
	.preset = snd_hda_preset_hdmi,
	.owner = THIS_MODULE,
};

static int __init patch_hdmi_init(void)
{
	return snd_hda_add_codec_preset(&intel_list);
}

static void __exit patch_hdmi_exit(void)
{
	snd_hda_delete_codec_preset(&intel_list);
}

module_init(patch_hdmi_init)
module_exit(patch_hdmi_exit)