hugetlbpage-hash64.c 3.9 KB
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/*
 * PPC64 Huge TLB Page Support for hash based MMUs (POWER4 and later)
 *
 * Copyright (C) 2003 David Gibson, IBM Corporation.
 *
 * Based on the IA-32 version:
 * Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
 */

#include <linux/mm.h>
#include <linux/hugetlb.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/cacheflush.h>
#include <asm/machdep.h>

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extern long hpte_insert_repeating(unsigned long hash, unsigned long vpn,
				  unsigned long pa, unsigned long rlags,
				  unsigned long vflags, int psize, int ssize);

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int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid,
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		     pte_t *ptep, unsigned long trap, unsigned long flags,
		     int ssize, unsigned int shift, unsigned int mmu_psize)
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{
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	unsigned long vpn;
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	unsigned long old_pte, new_pte;
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	unsigned long rflags, pa, sz;
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	long slot;

	BUG_ON(shift != mmu_psize_defs[mmu_psize].shift);

	/* Search the Linux page table for a match with va */
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	vpn = hpt_vpn(ea, vsid, ssize);
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	/* At this point, we have a pte (old_pte) which can be used to build
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	 * or update an HPTE. There are 2 cases:
	 *
	 * 1. There is a valid (present) pte with no associated HPTE (this is
	 *	the most common case)
	 * 2. There is a valid (present) pte with an associated HPTE. The
	 *	current values of the pp bits in the HPTE prevent access
	 *	because we are doing software DIRTY bit management and the
	 *	page is currently not DIRTY.
	 */


	do {
		old_pte = pte_val(*ptep);
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		/* If PTE busy, retry the access */
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		if (unlikely(old_pte & H_PAGE_BUSY))
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			return 0;
		/* If PTE permissions don't match, take page fault */
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		if (unlikely(!check_pte_access(access, old_pte)))
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			return 1;
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		/* Try to lock the PTE, add ACCESSED and DIRTY if it was
		 * a write access */
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		new_pte = old_pte | H_PAGE_BUSY | _PAGE_ACCESSED;
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		if (access & _PAGE_WRITE)
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			new_pte |= _PAGE_DIRTY;
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	} while(!pte_xchg(ptep, __pte(old_pte), __pte(new_pte)));

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	rflags = htab_convert_pte_flags(new_pte);
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	sz = ((1UL) << shift);
	if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
		/* No CPU has hugepages but lacks no execute, so we
		 * don't need to worry about that case */
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		rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
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	/* Check if pte already has an hpte (case 2) */
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	if (unlikely(old_pte & H_PAGE_HASHPTE)) {
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		/* There MIGHT be an HPTE for this pte */
		unsigned long hash, slot;

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		hash = hpt_hash(vpn, shift, ssize);
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		if (old_pte & H_PAGE_F_SECOND)
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			hash = ~hash;
		slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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		slot += (old_pte & H_PAGE_F_GIX) >> H_PAGE_F_GIX_SHIFT;
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		if (ppc_md.hpte_updatepp(slot, rflags, vpn, mmu_psize,
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					 mmu_psize, ssize, flags) == -1)
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			old_pte &= ~_PAGE_HPTEFLAGS;
	}

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	if (likely(!(old_pte & H_PAGE_HASHPTE))) {
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		unsigned long hash = hpt_hash(vpn, shift, ssize);
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		pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;

		/* clear HPTE slot informations in new PTE */
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		new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | H_PAGE_HASHPTE;
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		slot = hpte_insert_repeating(hash, vpn, pa, rflags, 0,
					     mmu_psize, ssize);
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		/*
		 * Hypervisor failure. Restore old pte and return -1
		 * similar to __hash_page_*
		 */
		if (unlikely(slot == -2)) {
			*ptep = __pte(old_pte);
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			hash_failure_debug(ea, access, vsid, trap, ssize,
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					   mmu_psize, mmu_psize, old_pte);
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			return -1;
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		}
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		new_pte |= (slot << H_PAGE_F_GIX_SHIFT) &
			(H_PAGE_F_SECOND | H_PAGE_F_GIX);
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	}

	/*
	 * No need to use ldarx/stdcx here
	 */
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	*ptep = __pte(new_pte & ~H_PAGE_BUSY);
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	return 0;
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}
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#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_DEBUG_VM)
/*
 * This enables us to catch the wrong page directory format
 * Moved here so that we can use WARN() in the call.
 */
int hugepd_ok(hugepd_t hpd)
{
	bool is_hugepd;

	/*
	 * We should not find this format in page directory, warn otherwise.
	 */
	is_hugepd = (((hpd.pd & 0x3) == 0x0) && ((hpd.pd & HUGEPD_SHIFT_MASK) != 0));
	WARN(is_hugepd, "Found wrong page directory format\n");
	return 0;
}
#endif