armada-cp110-slave.dtsi 7.7 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54
/*
 * Copyright (C) 2016 Marvell Technology Group Ltd.
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPLv2 or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

/*
 * Device Tree file for Marvell Armada CP110 Slave.
 */

/ {
	cp110-slave {
		#address-cells = <2>;
		#size-cells = <2>;
		compatible = "simple-bus";
		interrupt-parent = <&gic>;
		ranges;

55
		config-space@f4000000 {
56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			interrupt-parent = <&gic>;
			ranges = <0x0 0x0 0xf4000000 0x2000000>;

			cps_syscon0: system-controller@440000 {
				compatible = "marvell,cp110-system-controller0",
					     "syscon";
				reg = <0x440000 0x1000>;
				#clock-cells = <2>;
				core-clock-output-names =
					"cps-apll", "cps-ppv2-core", "cps-eip",
					"cps-core", "cps-nand-core";
				gate-clock-output-names =
					"cps-audio", "cps-communit", "cps-nand",
					"cps-ppv2", "cps-sdio", "cps-mg-domain",
					"cps-mg-core", "cps-xor1", "cps-xor0",
					"cps-gop-dp", "none", "cps-pcie_x10",
					"cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
					"cps-sata", "cps-sata-usb", "cps-main",
					"cps-sd-mmc", "none", "none",
					"cps-slow-io", "cps-usb3h0", "cps-usb3h1",
					"cps-usb3dev", "cps-eip150", "cps-eip197";
			};

			cps_sata0: sata@540000 {
83 84
				compatible = "marvell,armada-8k-ahci",
					     "generic-ahci";
85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133
				reg = <0x540000 0x30000>;
				interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cps_syscon0 1 15>;
				status = "disabled";
			};

			cps_usb3_0: usb3@500000 {
				compatible = "marvell,armada-8k-xhci",
					     "generic-xhci";
				reg = <0x500000 0x4000>;
				dma-coherent;
				interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cps_syscon0 1 22>;
				status = "disabled";
			};

			cps_usb3_1: usb3@510000 {
				compatible = "marvell,armada-8k-xhci",
					     "generic-xhci";
				reg = <0x510000 0x4000>;
				dma-coherent;
				interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cps_syscon0 1 23>;
				status = "disabled";
			};

			cps_xor0: xor@6a0000 {
				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
				reg = <0x6a0000 0x1000>,
				      <0x6b0000 0x1000>;
				dma-coherent;
				msi-parent = <&gic_v2m0>;
				clocks = <&cps_syscon0 1 8>;
			};

			cps_xor1: xor@6c0000 {
				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
				reg = <0x6c0000 0x1000>,
				      <0x6d0000 0x1000>;
				dma-coherent;
				msi-parent = <&gic_v2m0>;
				clocks = <&cps_syscon0 1 7>;
			};

			cps_spi0: spi@700600 {
				compatible = "marvell,armada-380-spi";
				reg = <0x700600 0x50>;
				#address-cells = <0x1>;
				#size-cells = <0x0>;
134
				cell-index = <3>;
135
				clocks = <&cps_syscon0 1 21>;
136 137 138 139 140 141 142 143
				status = "disabled";
			};

			cps_spi1: spi@700680 {
				compatible = "marvell,armada-380-spi";
				reg = <0x700680 0x50>;
				#address-cells = <1>;
				#size-cells = <0>;
144
				cell-index = <4>;
145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167
				clocks = <&cps_syscon0 1 21>;
				status = "disabled";
			};

			cps_i2c0: i2c@701000 {
				compatible = "marvell,mv78230-i2c";
				reg = <0x701000 0x20>;
				#address-cells = <1>;
				#size-cells = <0>;
				interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cps_syscon0 1 21>;
				status = "disabled";
			};

			cps_i2c1: i2c@701100 {
				compatible = "marvell,mv78230-i2c";
				reg = <0x701100 0x20>;
				#address-cells = <1>;
				#size-cells = <0>;
				interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cps_syscon0 1 21>;
				status = "disabled";
			};
168 169 170 171 172 173 174 175

			cps_trng: trng@760000 {
				compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
				reg = <0x760000 0x7d>;
				interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&cps_syscon0 1 25>;
				status = "okay";
			};
176 177 178 179 180 181 182 183 184 185 186 187
		};

		cps_pcie0: pcie@f4600000 {
			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
			reg = <0 0xf4600000 0 0x10000>,
			      <0 0xfaf00000 0 0x80000>;
			reg-names = "ctrl", "config";
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			device_type = "pci";
			dma-coherent;
188
			msi-parent = <&gic_v2m0>;
189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213

			bus-range = <0 0xff>;
			ranges =
				/* downstream I/O */
				<0x81000000 0 0xfd000000 0  0xfd000000 0 0x10000
				/* non-prefetchable memory */
				0x82000000 0 0xfa000000 0  0xfa000000 0 0xf00000>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
			num-lanes = <1>;
			clocks = <&cps_syscon0 1 13>;
			status = "disabled";
		};

		cps_pcie1: pcie@f4620000 {
			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
			reg = <0 0xf4620000 0 0x10000>,
			      <0 0xfbf00000 0 0x80000>;
			reg-names = "ctrl", "config";
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			device_type = "pci";
			dma-coherent;
214
			msi-parent = <&gic_v2m0>;
215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240

			bus-range = <0 0xff>;
			ranges =
				/* downstream I/O */
				<0x81000000 0 0xfd010000 0  0xfd010000 0 0x10000
				/* non-prefetchable memory */
				0x82000000 0 0xfb000000 0  0xfb000000 0 0xf00000>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
			interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;

			num-lanes = <1>;
			clocks = <&cps_syscon0 1 11>;
			status = "disabled";
		};

		cps_pcie2: pcie@f4640000 {
			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
			reg = <0 0xf4640000 0 0x10000>,
			      <0 0xfcf00000 0 0x80000>;
			reg-names = "ctrl", "config";
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			device_type = "pci";
			dma-coherent;
241
			msi-parent = <&gic_v2m0>;
242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258

			bus-range = <0 0xff>;
			ranges =
				/* downstream I/O */
				<0x81000000 0 0xfd020000 0  0xfd020000 0 0x10000
				/* non-prefetchable memory */
				0x82000000 0 0xfc000000 0  0xfc000000 0 0xf00000>;
			interrupt-map-mask = <0 0 0 0>;
			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
			interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;

			num-lanes = <1>;
			clocks = <&cps_syscon0 1 12>;
			status = "disabled";
		};
	};
};