time.c 2.5 KB
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/*
 * arch/arm/plat-iop/time.c
 *
 * Timer code for IOP32x and IOP33x based systems
 *
 * Author: Deepak Saxena <dsaxena@mvista.com>
 *
 * Copyright 2002-2003 MontaVista Software Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
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#include <asm/arch/time.h>
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static unsigned long ticks_per_jiffy;
static unsigned long ticks_per_usec;
static unsigned long next_jiffy_time;

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unsigned long iop_gettimeoffset(void)
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{
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	unsigned long offset, temp;
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	/* enable cp6, if necessary, to avoid taking the overhead of an
	 * undefined instruction trap
	 */
	asm volatile (
	"mrc	p15, 0, %0, c15, c1, 0\n\t"
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	"tst	%0, #(1 << 6)\n\t"
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	"orreq	%0, %0, #(1 << 6)\n\t"
	"mcreq	p15, 0, %0, c15, c1, 0\n\t"
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#ifdef CONFIG_CPU_XSCALE
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	"mrceq	p15, 0, %0, c15, c1, 0\n\t"
	"moveq	%0, %0\n\t"
	"subeq	pc, pc, #4\n\t"
#endif
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	: "=r"(temp) : : "cc");
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	offset = next_jiffy_time - read_tcr1();
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	return offset / ticks_per_usec;
}

static irqreturn_t
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iop_timer_interrupt(int irq, void *dev_id)
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{
	write_seqlock(&xtime_lock);

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	write_tisr(1);
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	while ((signed long)(next_jiffy_time - read_tcr1())
		>= ticks_per_jiffy) {
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		timer_tick();
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		next_jiffy_time -= ticks_per_jiffy;
	}

	write_sequnlock(&xtime_lock);

	return IRQ_HANDLED;
}

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static struct irqaction iop_timer_irq = {
	.name		= "IOP Timer Tick",
	.handler	= iop_timer_interrupt,
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Bernhard Walle 已提交
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	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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};

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static unsigned long iop_tick_rate;
unsigned long get_iop_tick_rate(void)
{
	return iop_tick_rate;
}
EXPORT_SYMBOL(get_iop_tick_rate);

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void __init iop_init_time(unsigned long tick_rate)
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{
	u32 timer_ctl;

	ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
	ticks_per_usec = tick_rate / 1000000;
	next_jiffy_time = 0xffffffff;
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	iop_tick_rate = tick_rate;
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	timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
			IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
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	/*
	 * We use timer 0 for our timer interrupt, and timer 1 as
	 * monotonic counter for tracking missed jiffies.
	 */
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	write_trr0(ticks_per_jiffy - 1);
	write_tmr0(timer_ctl);
	write_trr1(0xffffffff);
	write_tmr1(timer_ctl);
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	setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
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}