sh_mobile_lcdcfb.c 31.3 KB
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/*
 * SuperH Mobile LCDC Framebuffer
 *
 * Copyright (c) 2008 Magnus Damm
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/mm.h>
#include <linux/clk.h>
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#include <linux/pm_runtime.h>
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#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/vmalloc.h>
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#include <linux/ioctl.h>
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#include <linux/slab.h>
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#include <video/sh_mobile_lcdc.h>
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#include <asm/atomic.h>
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#include "sh_mobile_lcdcfb.h"

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#define SIDE_B_OFFSET 0x1000
#define MIRROR_OFFSET 0x2000
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/* shared registers */
#define _LDDCKR 0x410
#define _LDDCKSTPR 0x414
#define _LDINTR 0x468
#define _LDSR 0x46c
#define _LDCNT1R 0x470
#define _LDCNT2R 0x474
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#define _LDRCNTR 0x478
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#define _LDDDSR 0x47c
#define _LDDWD0R 0x800
#define _LDDRDR 0x840
#define _LDDWAR 0x900
#define _LDDRAR 0x904

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/* shared registers and their order for context save/restore */
static int lcdc_shared_regs[] = {
	_LDDCKR,
	_LDDCKSTPR,
	_LDINTR,
	_LDDDSR,
	_LDCNT1R,
	_LDCNT2R,
};
#define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)

static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
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	[LDDCKPAT1R] = 0x400,
	[LDDCKPAT2R] = 0x404,
	[LDMT1R] = 0x418,
	[LDMT2R] = 0x41c,
	[LDMT3R] = 0x420,
	[LDDFR] = 0x424,
	[LDSM1R] = 0x428,
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	[LDSM2R] = 0x42c,
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	[LDSA1R] = 0x430,
	[LDMLSR] = 0x438,
	[LDHCNR] = 0x448,
	[LDHSYNR] = 0x44c,
	[LDVLNR] = 0x450,
	[LDVSYNR] = 0x454,
	[LDPMR] = 0x460,
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	[LDHAJR] = 0x4a0,
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};

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static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
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	[LDDCKPAT1R] = 0x408,
	[LDDCKPAT2R] = 0x40c,
	[LDMT1R] = 0x600,
	[LDMT2R] = 0x604,
	[LDMT3R] = 0x608,
	[LDDFR] = 0x60c,
	[LDSM1R] = 0x610,
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	[LDSM2R] = 0x614,
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	[LDSA1R] = 0x618,
	[LDMLSR] = 0x620,
	[LDHCNR] = 0x624,
	[LDHSYNR] = 0x628,
	[LDVLNR] = 0x62c,
	[LDVSYNR] = 0x630,
	[LDPMR] = 0x63c,
};

#define START_LCDC	0x00000001
#define LCDC_RESET	0x00000100
#define DISPLAY_BEU	0x00000008
#define LCDC_ENABLE	0x00000001
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#define LDINTR_FE	0x00000400
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#define LDINTR_VSE	0x00000200
#define LDINTR_VEE	0x00000100
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#define LDINTR_FS	0x00000004
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#define LDINTR_VSS	0x00000002
#define LDINTR_VES	0x00000001
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#define LDRCNTR_SRS	0x00020000
#define LDRCNTR_SRC	0x00010000
#define LDRCNTR_MRS	0x00000002
#define LDRCNTR_MRC	0x00000001
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#define LDSR_MRS	0x00000100
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struct sh_mobile_lcdc_priv {
	void __iomem *base;
	int irq;
	atomic_t hw_usecnt;
	struct device *dev;
	struct clk *dot_clk;
	unsigned long lddckr;
	struct sh_mobile_lcdc_chan ch[2];
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	struct notifier_block notifier;
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	unsigned long saved_shared_regs[NR_SHARED_REGS];
	int started;
};

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static bool banked(int reg_nr)
{
	switch (reg_nr) {
	case LDMT1R:
	case LDMT2R:
	case LDMT3R:
	case LDDFR:
	case LDSM1R:
	case LDSA1R:
	case LDMLSR:
	case LDHCNR:
	case LDHSYNR:
	case LDVLNR:
	case LDVSYNR:
		return true;
	}
	return false;
}

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static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
			    int reg_nr, unsigned long data)
{
	iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
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	if (banked(reg_nr))
		iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
			  SIDE_B_OFFSET);
}

static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
			    int reg_nr, unsigned long data)
{
	iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
		  MIRROR_OFFSET);
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}

static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
				    int reg_nr)
{
	return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
}

static void lcdc_write(struct sh_mobile_lcdc_priv *priv,
		       unsigned long reg_offs, unsigned long data)
{
	iowrite32(data, priv->base + reg_offs);
}

static unsigned long lcdc_read(struct sh_mobile_lcdc_priv *priv,
			       unsigned long reg_offs)
{
	return ioread32(priv->base + reg_offs);
}

static void lcdc_wait_bit(struct sh_mobile_lcdc_priv *priv,
			  unsigned long reg_offs,
			  unsigned long mask, unsigned long until)
{
	while ((lcdc_read(priv, reg_offs) & mask) != until)
		cpu_relax();
}

static int lcdc_chan_is_sublcd(struct sh_mobile_lcdc_chan *chan)
{
	return chan->cfg.chan == LCDC_CHAN_SUBLCD;
}

static void lcdc_sys_write_index(void *handle, unsigned long data)
{
	struct sh_mobile_lcdc_chan *ch = handle;

	lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
	lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
	lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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	lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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}

static void lcdc_sys_write_data(void *handle, unsigned long data)
{
	struct sh_mobile_lcdc_chan *ch = handle;

	lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
	lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
	lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
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	lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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}

static unsigned long lcdc_sys_read_data(void *handle)
{
	struct sh_mobile_lcdc_chan *ch = handle;

	lcdc_write(ch->lcdc, _LDDRDR, 0x01000000);
	lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
	lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
	udelay(1);
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	lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
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	return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
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}

struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
	lcdc_sys_write_index,
	lcdc_sys_write_data,
	lcdc_sys_read_data,
};

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static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
{
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	if (atomic_inc_and_test(&priv->hw_usecnt)) {
		pm_runtime_get_sync(priv->dev);
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		if (priv->dot_clk)
			clk_enable(priv->dot_clk);
	}
}

static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
{
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	if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
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		if (priv->dot_clk)
			clk_disable(priv->dot_clk);
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		pm_runtime_put(priv->dev);
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	}
}

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static int sh_mobile_lcdc_sginit(struct fb_info *info,
				  struct list_head *pagelist)
{
	struct sh_mobile_lcdc_chan *ch = info->par;
	unsigned int nr_pages_max = info->fix.smem_len >> PAGE_SHIFT;
	struct page *page;
	int nr_pages = 0;

	sg_init_table(ch->sglist, nr_pages_max);

	list_for_each_entry(page, pagelist, lru)
		sg_set_page(&ch->sglist[nr_pages++], page, PAGE_SIZE, 0);

	return nr_pages;
}

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static void sh_mobile_lcdc_deferred_io(struct fb_info *info,
				       struct list_head *pagelist)
{
	struct sh_mobile_lcdc_chan *ch = info->par;
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	struct sh_mobile_lcdc_board_cfg	*bcfg = &ch->cfg.board_cfg;
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	/* enable clocks before accessing hardware */
	sh_mobile_lcdc_clk_on(ch->lcdc);

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	/*
	 * It's possible to get here without anything on the pagelist via
	 * sh_mobile_lcdc_deferred_io_touch() or via a userspace fsync()
	 * invocation. In the former case, the acceleration routines are
	 * stepped in to when using the framebuffer console causing the
	 * workqueue to be scheduled without any dirty pages on the list.
	 *
	 * Despite this, a panel update is still needed given that the
	 * acceleration routines have their own methods for writing in
	 * that still need to be updated.
	 *
	 * The fsync() and empty pagelist case could be optimized for,
	 * but we don't bother, as any application exhibiting such
	 * behaviour is fundamentally broken anyways.
	 */
	if (!list_empty(pagelist)) {
		unsigned int nr_pages = sh_mobile_lcdc_sginit(info, pagelist);

		/* trigger panel update */
		dma_map_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
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		if (bcfg->start_transfer)
			bcfg->start_transfer(bcfg->board_data, ch,
					     &sh_mobile_lcdc_sys_bus_ops);
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		lcdc_write_chan(ch, LDSM2R, 1);
		dma_unmap_sg(info->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
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	} else {
		if (bcfg->start_transfer)
			bcfg->start_transfer(bcfg->board_data, ch,
					     &sh_mobile_lcdc_sys_bus_ops);
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		lcdc_write_chan(ch, LDSM2R, 1);
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	}
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}

static void sh_mobile_lcdc_deferred_io_touch(struct fb_info *info)
{
	struct fb_deferred_io *fbdefio = info->fbdefio;

	if (fbdefio)
		schedule_delayed_work(&info->deferred_work, fbdefio->delay);
}

static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
{
	struct sh_mobile_lcdc_priv *priv = data;
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	struct sh_mobile_lcdc_chan *ch;
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	unsigned long tmp;
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	unsigned long ldintr;
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	int is_sub;
	int k;
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	/* acknowledge interrupt */
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	ldintr = tmp = lcdc_read(priv, _LDINTR);
	/*
	 * disable further VSYNC End IRQs, preserve all other enabled IRQs,
	 * write 0 to bits 0-6 to ack all triggered IRQs.
	 */
	tmp &= 0xffffff00 & ~LDINTR_VEE;
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	lcdc_write(priv, _LDINTR, tmp);

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	/* figure out if this interrupt is for main or sub lcd */
	is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;

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	/* wake up channel and disable clocks */
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	for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
		ch = &priv->ch[k];

		if (!ch->enabled)
			continue;

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		/* Frame Start */
		if (ldintr & LDINTR_FS) {
			if (is_sub == lcdc_chan_is_sublcd(ch)) {
				ch->frame_end = 1;
				wake_up(&ch->frame_end_wait);
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				sh_mobile_lcdc_clk_off(priv);
			}
		}

		/* VSYNC End */
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		if (ldintr & LDINTR_VES)
			complete(&ch->vsync_completion);
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	}

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	return IRQ_HANDLED;
}

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static void sh_mobile_lcdc_start_stop(struct sh_mobile_lcdc_priv *priv,
				      int start)
{
	unsigned long tmp = lcdc_read(priv, _LDCNT2R);
	int k;

	/* start or stop the lcdc */
	if (start)
		lcdc_write(priv, _LDCNT2R, tmp | START_LCDC);
	else
		lcdc_write(priv, _LDCNT2R, tmp & ~START_LCDC);

	/* wait until power is applied/stopped on all channels */
	for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
		if (lcdc_read(priv, _LDCNT2R) & priv->ch[k].enabled)
			while (1) {
				tmp = lcdc_read_chan(&priv->ch[k], LDPMR) & 3;
				if (start && tmp == 3)
					break;
				if (!start && tmp == 0)
					break;
				cpu_relax();
			}

	if (!start)
		lcdc_write(priv, _LDDCKSTPR, 1); /* stop dotclock */
}

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static void sh_mobile_lcdc_geometry(struct sh_mobile_lcdc_chan *ch)
{
	struct fb_var_screeninfo *var = &ch->info->var;
	unsigned long h_total, hsync_pos;
	u32 tmp;

	tmp = ch->ldmt1r_value;
	tmp |= (var->sync & FB_SYNC_VERT_HIGH_ACT) ? 0 : 1 << 28;
	tmp |= (var->sync & FB_SYNC_HOR_HIGH_ACT) ? 0 : 1 << 27;
	tmp |= (ch->cfg.flags & LCDC_FLAGS_DWPOL) ? 1 << 26 : 0;
	tmp |= (ch->cfg.flags & LCDC_FLAGS_DIPOL) ? 1 << 25 : 0;
	tmp |= (ch->cfg.flags & LCDC_FLAGS_DAPOL) ? 1 << 24 : 0;
	tmp |= (ch->cfg.flags & LCDC_FLAGS_HSCNT) ? 1 << 17 : 0;
	tmp |= (ch->cfg.flags & LCDC_FLAGS_DWCNT) ? 1 << 16 : 0;
	lcdc_write_chan(ch, LDMT1R, tmp);

	/* setup SYS bus */
	lcdc_write_chan(ch, LDMT2R, ch->cfg.sys_bus_cfg.ldmt2r);
	lcdc_write_chan(ch, LDMT3R, ch->cfg.sys_bus_cfg.ldmt3r);

	/* horizontal configuration */
	h_total = var->xres + var->hsync_len +
		var->left_margin + var->right_margin;
	tmp = h_total / 8; /* HTCN */
	tmp |= (var->xres / 8) << 16; /* HDCN */
	lcdc_write_chan(ch, LDHCNR, tmp);

	hsync_pos = var->xres + var->right_margin;
	tmp = hsync_pos / 8; /* HSYNP */
	tmp |= (var->hsync_len / 8) << 16; /* HSYNW */
	lcdc_write_chan(ch, LDHSYNR, tmp);

	/* vertical configuration */
	tmp = var->yres + var->vsync_len +
		var->upper_margin + var->lower_margin; /* VTLN */
	tmp |= var->yres << 16; /* VDLN */
	lcdc_write_chan(ch, LDVLNR, tmp);

	tmp = var->yres + var->lower_margin; /* VSYNP */
	tmp |= var->vsync_len << 16; /* VSYNW */
	lcdc_write_chan(ch, LDVSYNR, tmp);

	/* Adjust horizontal synchronisation for HDMI */
	tmp = ((var->xres & 7) << 24) |
		((h_total & 7) << 16) |
		((var->hsync_len & 7) << 8) |
		hsync_pos;
	lcdc_write_chan(ch, LDHAJR, tmp);
}

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static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv)
{
	struct sh_mobile_lcdc_chan *ch;
	struct sh_mobile_lcdc_board_cfg	*board_cfg;
	unsigned long tmp;
	int k, m;
	int ret = 0;

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	/* enable clocks before accessing the hardware */
	for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
		if (priv->ch[k].enabled)
			sh_mobile_lcdc_clk_on(priv);

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	/* reset */
	lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) | LCDC_RESET);
	lcdc_wait_bit(priv, _LDCNT2R, LCDC_RESET, 0);

	/* enable LCDC channels */
	tmp = lcdc_read(priv, _LDCNT2R);
	tmp |= priv->ch[0].enabled;
	tmp |= priv->ch[1].enabled;
	lcdc_write(priv, _LDCNT2R, tmp);

	/* read data from external memory, avoid using the BEU for now */
	lcdc_write(priv, _LDCNT2R, lcdc_read(priv, _LDCNT2R) & ~DISPLAY_BEU);

	/* stop the lcdc first */
	sh_mobile_lcdc_start_stop(priv, 0);

	/* configure clocks */
	tmp = priv->lddckr;
	for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
		ch = &priv->ch[k];

		if (!priv->ch[k].enabled)
			continue;

		m = ch->cfg.clock_divider;
		if (!m)
			continue;

		if (m == 1)
			m = 1 << 6;
		tmp |= m << (lcdc_chan_is_sublcd(ch) ? 8 : 0);

		lcdc_write_chan(ch, LDDCKPAT1R, 0x00000000);
		lcdc_write_chan(ch, LDDCKPAT2R, (1 << (m/2)) - 1);
	}

	lcdc_write(priv, _LDDCKR, tmp);

	/* start dotclock again */
	lcdc_write(priv, _LDDCKSTPR, 0);
	lcdc_wait_bit(priv, _LDDCKSTPR, ~0, 0);

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	/* interrupts are disabled to begin with */
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	lcdc_write(priv, _LDINTR, 0);

	for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
		ch = &priv->ch[k];

		if (!ch->enabled)
			continue;

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		sh_mobile_lcdc_geometry(ch);
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		/* power supply */
		lcdc_write_chan(ch, LDPMR, 0);

		board_cfg = &ch->cfg.board_cfg;
		if (board_cfg->setup_sys)
			ret = board_cfg->setup_sys(board_cfg->board_data, ch,
						   &sh_mobile_lcdc_sys_bus_ops);
		if (ret)
			return ret;
	}

	/* word and long word swap */
	lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6);

	for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
		ch = &priv->ch[k];

		if (!priv->ch[k].enabled)
			continue;

		/* set bpp format in PKF[4:0] */
		tmp = lcdc_read_chan(ch, LDDFR);
		tmp &= ~(0x0001001f);
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		tmp |= (ch->info->var.bits_per_pixel == 16) ? 3 : 0;
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		lcdc_write_chan(ch, LDDFR, tmp);

		/* point out our frame buffer */
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		lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start);
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		/* set line size */
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		lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length);
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		/* setup deferred io if SYS bus */
		tmp = ch->cfg.sys_bus_cfg.deferred_io_msec;
		if (ch->ldmt1r_value & (1 << 12) && tmp) {
			ch->defio.deferred_io = sh_mobile_lcdc_deferred_io;
			ch->defio.delay = msecs_to_jiffies(tmp);
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			ch->info->fbdefio = &ch->defio;
			fb_deferred_io_init(ch->info);
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			/* one-shot mode */
			lcdc_write_chan(ch, LDSM1R, 1);

			/* enable "Frame End Interrupt Enable" bit */
			lcdc_write(priv, _LDINTR, LDINTR_FE);

		} else {
			/* continuous read mode */
			lcdc_write_chan(ch, LDSM1R, 0);
		}
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	}

	/* display output */
	lcdc_write(priv, _LDCNT1R, LCDC_ENABLE);

	/* start the lcdc */
	sh_mobile_lcdc_start_stop(priv, 1);
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	priv->started = 1;
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	/* tell the board code to enable the panel */
	for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
		ch = &priv->ch[k];
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		if (!ch->enabled)
			continue;

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		board_cfg = &ch->cfg.board_cfg;
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		if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
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			board_cfg->display_on(board_cfg->board_data, ch->info);
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			module_put(board_cfg->owner);
		}
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	}

	return 0;
}

static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
{
	struct sh_mobile_lcdc_chan *ch;
	struct sh_mobile_lcdc_board_cfg	*board_cfg;
	int k;

582
	/* clean up deferred io and ask board code to disable panel */
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	for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
		ch = &priv->ch[k];
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		if (!ch->enabled)
			continue;
587

588 589 590 591
		/* deferred io mode:
		 * flush frame, and wait for frame end interrupt
		 * clean up deferred io and enable clock
		 */
592
		if (ch->info && ch->info->fbdefio) {
593
			ch->frame_end = 0;
594
			schedule_delayed_work(&ch->info->deferred_work, 0);
595
			wait_event(ch->frame_end_wait, ch->frame_end);
596 597
			fb_deferred_io_cleanup(ch->info);
			ch->info->fbdefio = NULL;
598
			sh_mobile_lcdc_clk_on(priv);
599
		}
600 601

		board_cfg = &ch->cfg.board_cfg;
602
		if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
603
			board_cfg->display_off(board_cfg->board_data);
604 605
			module_put(board_cfg->owner);
		}
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	}

	/* stop the lcdc */
609 610 611 612
	if (priv->started) {
		sh_mobile_lcdc_start_stop(priv, 0);
		priv->started = 0;
	}
613

614 615 616 617
	/* stop clocks */
	for (k = 0; k < ARRAY_SIZE(priv->ch); k++)
		if (priv->ch[k].enabled)
			sh_mobile_lcdc_clk_off(priv);
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}

static int sh_mobile_lcdc_check_interface(struct sh_mobile_lcdc_chan *ch)
{
	int ifm, miftyp;

	switch (ch->cfg.interface_type) {
	case RGB8: ifm = 0; miftyp = 0; break;
	case RGB9: ifm = 0; miftyp = 4; break;
	case RGB12A: ifm = 0; miftyp = 5; break;
	case RGB12B: ifm = 0; miftyp = 6; break;
	case RGB16: ifm = 0; miftyp = 7; break;
	case RGB18: ifm = 0; miftyp = 10; break;
	case RGB24: ifm = 0; miftyp = 11; break;
	case SYS8A: ifm = 1; miftyp = 0; break;
	case SYS8B: ifm = 1; miftyp = 1; break;
	case SYS8C: ifm = 1; miftyp = 2; break;
	case SYS8D: ifm = 1; miftyp = 3; break;
	case SYS9: ifm = 1; miftyp = 4; break;
	case SYS12: ifm = 1; miftyp = 5; break;
	case SYS16A: ifm = 1; miftyp = 7; break;
	case SYS16B: ifm = 1; miftyp = 8; break;
	case SYS16C: ifm = 1; miftyp = 9; break;
	case SYS18: ifm = 1; miftyp = 10; break;
	case SYS24: ifm = 1; miftyp = 11; break;
	default: goto bad;
	}

	/* SUBLCD only supports SYS interface */
	if (lcdc_chan_is_sublcd(ch)) {
		if (ifm == 0)
			goto bad;
		else
			ifm = 0;
	}

	ch->ldmt1r_value = (ifm << 12) | miftyp;
	return 0;
 bad:
	return -EINVAL;
}

660 661
static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
				       int clock_source,
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				       struct sh_mobile_lcdc_priv *priv)
{
	char *str;
	int icksel;

	switch (clock_source) {
	case LCDC_CLK_BUS: str = "bus_clk"; icksel = 0; break;
	case LCDC_CLK_PERIPHERAL: str = "peripheral_clk"; icksel = 1; break;
	case LCDC_CLK_EXTERNAL: str = NULL; icksel = 2; break;
	default:
		return -EINVAL;
	}

	priv->lddckr = icksel << 16;

	if (str) {
678 679 680 681
		priv->dot_clk = clk_get(&pdev->dev, str);
		if (IS_ERR(priv->dot_clk)) {
			dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
			return PTR_ERR(priv->dot_clk);
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		}
	}
684 685 686 687 688

	/* Runtime PM support involves two step for this driver:
	 * 1) Enable Runtime PM
	 * 2) Force Runtime PM Resume since hardware is accessed from probe()
	 */
689
	priv->dev = &pdev->dev;
690 691
	pm_runtime_enable(priv->dev);
	pm_runtime_resume(priv->dev);
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	return 0;
}

static int sh_mobile_lcdc_setcolreg(u_int regno,
				    u_int red, u_int green, u_int blue,
				    u_int transp, struct fb_info *info)
{
	u32 *palette = info->pseudo_palette;

	if (regno >= PALETTE_NR)
		return -EINVAL;

	/* only FB_VISUAL_TRUECOLOR supported */

	red >>= 16 - info->var.red.length;
	green >>= 16 - info->var.green.length;
	blue >>= 16 - info->var.blue.length;
	transp >>= 16 - info->var.transp.length;

	palette[regno] = (red << info->var.red.offset) |
	  (green << info->var.green.offset) |
	  (blue << info->var.blue.offset) |
	  (transp << info->var.transp.offset);

	return 0;
}

static struct fb_fix_screeninfo sh_mobile_lcdc_fix  = {
	.id =		"SH Mobile LCDC",
	.type =		FB_TYPE_PACKED_PIXELS,
	.visual =	FB_VISUAL_TRUECOLOR,
	.accel =	FB_ACCEL_NONE,
724 725 726
	.xpanstep =	0,
	.ypanstep =	1,
	.ywrapstep =	0,
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};

729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749
static void sh_mobile_lcdc_fillrect(struct fb_info *info,
				    const struct fb_fillrect *rect)
{
	sys_fillrect(info, rect);
	sh_mobile_lcdc_deferred_io_touch(info);
}

static void sh_mobile_lcdc_copyarea(struct fb_info *info,
				    const struct fb_copyarea *area)
{
	sys_copyarea(info, area);
	sh_mobile_lcdc_deferred_io_touch(info);
}

static void sh_mobile_lcdc_imageblit(struct fb_info *info,
				     const struct fb_image *image)
{
	sys_imageblit(info, image);
	sh_mobile_lcdc_deferred_io_touch(info);
}

750 751 752 753
static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
				     struct fb_info *info)
{
	struct sh_mobile_lcdc_chan *ch = info->par;
754 755 756 757 758 759
	struct sh_mobile_lcdc_priv *priv = ch->lcdc;
	unsigned long ldrcntr;
	unsigned long new_pan_offset;

	new_pan_offset = (var->yoffset * info->fix.line_length) +
		(var->xoffset * (info->var.bits_per_pixel / 8));
760

761
	if (new_pan_offset == ch->pan_offset)
762 763
		return 0;	/* No change, do nothing */

764
	ldrcntr = lcdc_read(priv, _LDRCNTR);
765

766 767 768 769 770 771 772 773 774 775
	/* Set the source address for the next refresh */
	lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset);
	if (lcdc_chan_is_sublcd(ch))
		lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
	else
		lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);

	ch->pan_offset = new_pan_offset;

	sh_mobile_lcdc_deferred_io_touch(info);
776 777 778 779

	return 0;
}

780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815
static int sh_mobile_wait_for_vsync(struct fb_info *info)
{
	struct sh_mobile_lcdc_chan *ch = info->par;
	unsigned long ldintr;
	int ret;

	/* Enable VSync End interrupt */
	ldintr = lcdc_read(ch->lcdc, _LDINTR);
	ldintr |= LDINTR_VEE;
	lcdc_write(ch->lcdc, _LDINTR, ldintr);

	ret = wait_for_completion_interruptible_timeout(&ch->vsync_completion,
							msecs_to_jiffies(100));
	if (!ret)
		return -ETIMEDOUT;

	return 0;
}

static int sh_mobile_ioctl(struct fb_info *info, unsigned int cmd,
		       unsigned long arg)
{
	int retval;

	switch (cmd) {
	case FBIO_WAITFORVSYNC:
		retval = sh_mobile_wait_for_vsync(info);
		break;

	default:
		retval = -ENOIOCTLCMD;
		break;
	}
	return retval;
}

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static struct fb_ops sh_mobile_lcdc_ops = {
817
	.owner          = THIS_MODULE,
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	.fb_setcolreg	= sh_mobile_lcdc_setcolreg,
819 820
	.fb_read        = fb_sys_read,
	.fb_write       = fb_sys_write,
821 822 823
	.fb_fillrect	= sh_mobile_lcdc_fillrect,
	.fb_copyarea	= sh_mobile_lcdc_copyarea,
	.fb_imageblit	= sh_mobile_lcdc_imageblit,
824
	.fb_pan_display = sh_mobile_fb_pan_display,
825
	.fb_ioctl       = sh_mobile_ioctl,
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};

static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
{
	switch (bpp) {
	case 16: /* PKF[4:0] = 00011 - RGB 565 */
		var->red.offset = 11;
		var->red.length = 5;
		var->green.offset = 5;
		var->green.length = 6;
		var->blue.offset = 0;
		var->blue.length = 5;
		var->transp.offset = 0;
		var->transp.length = 0;
		break;

	case 32: /* PKF[4:0] = 00000 - RGB 888
		  * sh7722 pdf says 00RRGGBB but reality is GGBB00RR
		  * this may be because LDDDSR has word swap enabled..
		  */
		var->red.offset = 0;
		var->red.length = 8;
		var->green.offset = 24;
		var->green.length = 8;
		var->blue.offset = 16;
		var->blue.length = 8;
		var->transp.offset = 0;
		var->transp.length = 0;
		break;
	default:
		return -EINVAL;
	}
	var->bits_per_pixel = bpp;
	var->red.msb_right = 0;
	var->green.msb_right = 0;
	var->blue.msb_right = 0;
	var->transp.msb_right = 0;
	return 0;
}

866 867 868 869 870 871 872 873 874 875 876 877 878 879 880
static int sh_mobile_lcdc_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);

	sh_mobile_lcdc_stop(platform_get_drvdata(pdev));
	return 0;
}

static int sh_mobile_lcdc_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);

	return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
}

881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928
static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
	struct sh_mobile_lcdc_chan *ch;
	int k, n;

	/* save per-channel registers */
	for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
		ch = &p->ch[k];
		if (!ch->enabled)
			continue;
		for (n = 0; n < NR_CH_REGS; n++)
			ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
	}

	/* save shared registers */
	for (n = 0; n < NR_SHARED_REGS; n++)
		p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);

	/* turn off LCDC hardware */
	lcdc_write(p, _LDCNT1R, 0);
	return 0;
}

static int sh_mobile_lcdc_runtime_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
	struct sh_mobile_lcdc_chan *ch;
	int k, n;

	/* restore per-channel registers */
	for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
		ch = &p->ch[k];
		if (!ch->enabled)
			continue;
		for (n = 0; n < NR_CH_REGS; n++)
			lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
	}

	/* restore shared registers */
	for (n = 0; n < NR_SHARED_REGS; n++)
		lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);

	return 0;
}

929
static const struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
930 931
	.suspend = sh_mobile_lcdc_suspend,
	.resume = sh_mobile_lcdc_resume,
932 933
	.runtime_suspend = sh_mobile_lcdc_runtime_suspend,
	.runtime_resume = sh_mobile_lcdc_runtime_resume,
934 935
};

936
/* locking: called with info->lock held */
937 938 939 940 941 942 943 944 945 946
static int sh_mobile_lcdc_notify(struct notifier_block *nb,
				 unsigned long action, void *data)
{
	struct fb_event *event = data;
	struct fb_info *info = event->info;
	struct sh_mobile_lcdc_chan *ch = info->par;
	struct sh_mobile_lcdc_board_cfg	*board_cfg = &ch->cfg.board_cfg;
	struct fb_var_screeninfo *var;

	if (&ch->lcdc->notifier != nb)
947
		return NOTIFY_DONE;
948 949 950 951 952 953

	dev_dbg(info->dev, "%s(): action = %lu, data = %p\n",
		__func__, action, event->data);

	switch(action) {
	case FB_EVENT_SUSPEND:
954
		if (try_module_get(board_cfg->owner) && board_cfg->display_off) {
955
			board_cfg->display_off(board_cfg->board_data);
956 957
			module_put(board_cfg->owner);
		}
958 959 960 961 962 963
		pm_runtime_put(info->device);
		break;
	case FB_EVENT_RESUME:
		var = &info->var;

		/* HDMI must be enabled before LCDC configuration */
964
		if (try_module_get(board_cfg->owner) && board_cfg->display_on) {
965
			board_cfg->display_on(board_cfg->board_data, ch->info);
966 967
			module_put(board_cfg->owner);
		}
968 969 970 971 972 973 974 975

		/* Check if the new display is not in our modelist */
		if (ch->info->modelist.next &&
		    !fb_match_mode(var, &ch->info->modelist)) {
			struct fb_videomode mode;
			int ret;

			/* Can we handle this display? */
976 977
			if (var->xres > ch->cfg.lcd_cfg[0].xres ||
			    var->yres > ch->cfg.lcd_cfg[0].yres)
978 979 980 981 982
				/*
				 * LCDC resume failed, no need to continue with
				 * the notifier chain
				 */
				return notifier_from_errno(-ENOMEM);
983 984 985 986 987

			/* Add to the modelist */
			fb_var_to_videomode(&mode, var);
			ret = fb_add_videomode(&mode, &ch->info->modelist);
			if (ret < 0)
988
				return notifier_from_errno(ret);
989 990 991 992 993 994 995
		}

		pm_runtime_get_sync(info->device);

		sh_mobile_lcdc_geometry(ch);
	}

996
	return NOTIFY_OK;
997 998
}

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static int sh_mobile_lcdc_remove(struct platform_device *pdev);

1001
static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev)
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1002 1003 1004
{
	struct fb_info *info;
	struct sh_mobile_lcdc_priv *priv;
1005
	struct sh_mobile_lcdc_info *pdata = pdev->dev.platform_data;
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1006 1007 1008 1009 1010 1011
	struct sh_mobile_lcdc_chan_cfg *cfg;
	struct resource *res;
	int error;
	void *buf;
	int i, j;

1012
	if (!pdata) {
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1013
		dev_err(&pdev->dev, "no platform data defined\n");
1014
		return -EINVAL;
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1015 1016 1017
	}

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1018 1019 1020
	i = platform_get_irq(pdev, 0);
	if (!res || i < 0) {
		dev_err(&pdev->dev, "cannot get platform resources\n");
1021
		return -ENOENT;
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1022 1023 1024 1025 1026
	}

	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
	if (!priv) {
		dev_err(&pdev->dev, "cannot allocate device data\n");
1027
		return -ENOMEM;
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1028 1029
	}

1030 1031
	platform_set_drvdata(pdev, priv);

1032
	error = request_irq(i, sh_mobile_lcdc_irq, IRQF_DISABLED,
1033
			    dev_name(&pdev->dev), priv);
1034 1035 1036 1037 1038 1039
	if (error) {
		dev_err(&pdev->dev, "unable to request irq\n");
		goto err1;
	}

	priv->irq = i;
1040
	atomic_set(&priv->hw_usecnt, -1);
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1041 1042 1043

	j = 0;
	for (i = 0; i < ARRAY_SIZE(pdata->ch); i++) {
1044
		struct sh_mobile_lcdc_chan *ch = priv->ch + j;
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1046 1047 1048 1049
		ch->lcdc = priv;
		memcpy(&ch->cfg, &pdata->ch[i], sizeof(pdata->ch[i]));

		error = sh_mobile_lcdc_check_interface(ch);
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1050 1051 1052 1053
		if (error) {
			dev_err(&pdev->dev, "unsupported interface type\n");
			goto err1;
		}
1054 1055 1056
		init_waitqueue_head(&ch->frame_end_wait);
		init_completion(&ch->vsync_completion);
		ch->pan_offset = 0;
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1057 1058 1059

		switch (pdata->ch[i].chan) {
		case LCDC_CHAN_MAINLCD:
1060 1061
			ch->enabled = 1 << 1;
			ch->reg_offs = lcdc_offs_mainlcd;
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1062 1063 1064
			j++;
			break;
		case LCDC_CHAN_SUBLCD:
1065 1066
			ch->enabled = 1 << 2;
			ch->reg_offs = lcdc_offs_sublcd;
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1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077
			j++;
			break;
		}
	}

	if (!j) {
		dev_err(&pdev->dev, "no channels defined\n");
		error = -EINVAL;
		goto err1;
	}

1078 1079 1080 1081
	priv->base = ioremap_nocache(res->start, resource_size(res));
	if (!priv->base)
		goto err1;

1082
	error = sh_mobile_lcdc_setup_clocks(pdev, pdata->clock_source, priv);
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1083 1084 1085 1086 1087 1088
	if (error) {
		dev_err(&pdev->dev, "unable to setup clocks\n");
		goto err1;
	}

	for (i = 0; i < j; i++) {
1089
		struct fb_var_screeninfo *var;
1090
		const struct fb_videomode *lcd_cfg, *max_cfg = NULL;
1091
		struct sh_mobile_lcdc_chan *ch = priv->ch + i;
1092 1093
		unsigned long max_size = 0;
		int k;
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1095 1096 1097 1098
		cfg = &ch->cfg;

		ch->info = framebuffer_alloc(0, &pdev->dev);
		if (!ch->info) {
1099 1100 1101 1102 1103
			dev_err(&pdev->dev, "unable to allocate fb_info\n");
			error = -ENOMEM;
			break;
		}

1104
		info = ch->info;
1105
		var = &info->var;
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1106
		info->fbops = &sh_mobile_lcdc_ops;
1107
		fb_videomode_to_var(var, &cfg->lcd_cfg[0]);
1108
		/* Default Y virtual resolution is 2x panel size */
1109 1110 1111
		var->yres_virtual = var->yres * 2;

		error = sh_mobile_lcdc_set_bpp(var, cfg->bpp);
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		if (error)
			break;

1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128
		for (k = 0, lcd_cfg = cfg->lcd_cfg;
		     k < cfg->num_cfg;
		     k++, lcd_cfg++) {
			unsigned long size = lcd_cfg->yres * lcd_cfg->xres;

			if (size > max_size) {
				max_cfg = lcd_cfg;
				max_size = size;
			}
		}

		dev_dbg(&pdev->dev, "Found largest videomode %ux%u\n",
			max_cfg->xres, max_cfg->yres);

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1129
		info->fix = sh_mobile_lcdc_fix;
1130 1131
		info->fix.line_length = cfg->lcd_cfg[0].xres * (cfg->bpp / 8);
		info->fix.smem_len = max_size * (cfg->bpp / 8) * 2;
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1132 1133

		buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
1134
					 &ch->dma_handle, GFP_KERNEL);
M
Magnus Damm 已提交
1135 1136 1137 1138 1139 1140
		if (!buf) {
			dev_err(&pdev->dev, "unable to allocate buffer\n");
			error = -ENOMEM;
			break;
		}

1141
		info->pseudo_palette = &ch->pseudo_palette;
M
Magnus Damm 已提交
1142 1143 1144 1145 1146 1147
		info->flags = FBINFO_FLAG_DEFAULT;

		error = fb_alloc_cmap(&info->cmap, PALETTE_NR, 0);
		if (error < 0) {
			dev_err(&pdev->dev, "unable to allocate cmap\n");
			dma_free_coherent(&pdev->dev, info->fix.smem_len,
1148
					  buf, ch->dma_handle);
M
Magnus Damm 已提交
1149 1150 1151
			break;
		}

1152
		info->fix.smem_start = ch->dma_handle;
M
Magnus Damm 已提交
1153 1154
		info->screen_base = buf;
		info->device = &pdev->dev;
1155
		info->par = ch;
M
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1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167
	}

	if (error)
		goto err1;

	error = sh_mobile_lcdc_start(priv);
	if (error) {
		dev_err(&pdev->dev, "unable to start hardware\n");
		goto err1;
	}

	for (i = 0; i < j; i++) {
1168 1169
		struct sh_mobile_lcdc_chan *ch = priv->ch + i;

1170
		info = ch->info;
1171 1172

		if (info->fbdefio) {
1173
			ch->sglist = vmalloc(sizeof(struct scatterlist) *
1174
					info->fix.smem_len >> PAGE_SHIFT);
1175
			if (!ch->sglist) {
1176 1177 1178 1179 1180 1181
				dev_err(&pdev->dev, "cannot allocate sglist\n");
				goto err1;
			}
		}

		error = register_framebuffer(info);
M
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1182 1183 1184 1185 1186 1187
		if (error < 0)
			goto err1;

		dev_info(info->dev,
			 "registered %s/%s as %dx%d %dbpp.\n",
			 pdev->name,
1188
			 (ch->cfg.chan == LCDC_CHAN_MAINLCD) ?
M
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			 "mainlcd" : "sublcd",
1190 1191
			 (int) ch->cfg.lcd_cfg[0].xres,
			 (int) ch->cfg.lcd_cfg[0].yres,
1192
			 ch->cfg.bpp);
1193 1194

		/* deferred io mode: disable clock to save power */
1195
		if (info->fbdefio || info->state == FBINFO_STATE_SUSPENDED)
1196
			sh_mobile_lcdc_clk_off(priv);
M
Magnus Damm 已提交
1197 1198
	}

1199 1200 1201 1202
	/* Failure ignored */
	priv->notifier.notifier_call = sh_mobile_lcdc_notify;
	fb_register_client(&priv->notifier);

M
Magnus Damm 已提交
1203
	return 0;
1204
err1:
M
Magnus Damm 已提交
1205
	sh_mobile_lcdc_remove(pdev);
1206

M
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1207 1208 1209 1210 1211 1212 1213 1214 1215
	return error;
}

static int sh_mobile_lcdc_remove(struct platform_device *pdev)
{
	struct sh_mobile_lcdc_priv *priv = platform_get_drvdata(pdev);
	struct fb_info *info;
	int i;

1216 1217
	fb_unregister_client(&priv->notifier);

M
Magnus Damm 已提交
1218
	for (i = 0; i < ARRAY_SIZE(priv->ch); i++)
1219
		if (priv->ch[i].info && priv->ch[i].info->dev)
1220
			unregister_framebuffer(priv->ch[i].info);
M
Magnus Damm 已提交
1221 1222 1223 1224

	sh_mobile_lcdc_stop(priv);

	for (i = 0; i < ARRAY_SIZE(priv->ch); i++) {
1225
		info = priv->ch[i].info;
M
Magnus Damm 已提交
1226

1227
		if (!info || !info->device)
M
Magnus Damm 已提交
1228 1229
			continue;

1230 1231 1232
		if (priv->ch[i].sglist)
			vfree(priv->ch[i].sglist);

M
Magnus Damm 已提交
1233 1234 1235
		dma_free_coherent(&pdev->dev, info->fix.smem_len,
				  info->screen_base, priv->ch[i].dma_handle);
		fb_dealloc_cmap(&info->cmap);
1236
		framebuffer_release(info);
M
Magnus Damm 已提交
1237 1238
	}

1239 1240
	if (priv->dot_clk)
		clk_put(priv->dot_clk);
1241

1242 1243
	if (priv->dev)
		pm_runtime_disable(priv->dev);
M
Magnus Damm 已提交
1244 1245 1246 1247

	if (priv->base)
		iounmap(priv->base);

1248 1249
	if (priv->irq)
		free_irq(priv->irq, priv);
M
Magnus Damm 已提交
1250 1251 1252 1253 1254 1255 1256 1257
	kfree(priv);
	return 0;
}

static struct platform_driver sh_mobile_lcdc_driver = {
	.driver		= {
		.name		= "sh_mobile_lcdc_fb",
		.owner		= THIS_MODULE,
1258
		.pm		= &sh_mobile_lcdc_dev_pm_ops,
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1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279
	},
	.probe		= sh_mobile_lcdc_probe,
	.remove		= sh_mobile_lcdc_remove,
};

static int __init sh_mobile_lcdc_init(void)
{
	return platform_driver_register(&sh_mobile_lcdc_driver);
}

static void __exit sh_mobile_lcdc_exit(void)
{
	platform_driver_unregister(&sh_mobile_lcdc_driver);
}

module_init(sh_mobile_lcdc_init);
module_exit(sh_mobile_lcdc_exit);

MODULE_DESCRIPTION("SuperH Mobile LCDC Framebuffer driver");
MODULE_AUTHOR("Magnus Damm <damm@opensource.se>");
MODULE_LICENSE("GPL v2");