htirq.c 4.5 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13
/*
 * File:	htirq.c
 * Purpose:	Hypertransport Interrupt Capability
 *
 * Copyright (C) 2006 Linux Networx
 * Copyright (C) Eric Biederman <ebiederman@lnxi.com>
 */

#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
#include <linux/gfp.h>
14
#include <linux/htirq.h>
15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190

/* Global ht irq lock.
 *
 * This is needed to serialize access to the data port in hypertransport
 * irq capability.
 *
 * With multiple simultaneous hypertransport irq devices it might pay
 * to make this more fine grained.  But start with simple, stupid, and correct.
 */
static DEFINE_SPINLOCK(ht_irq_lock);

struct ht_irq_cfg {
	struct pci_dev *dev;
	unsigned pos;
	unsigned idx;
};

void write_ht_irq_low(unsigned int irq, u32 data)
{
	struct ht_irq_cfg *cfg = get_irq_data(irq);
	unsigned long flags;
	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
	pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);
}

void write_ht_irq_high(unsigned int irq, u32 data)
{
	struct ht_irq_cfg *cfg = get_irq_data(irq);
	unsigned long flags;
	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
	pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);
}

u32 read_ht_irq_low(unsigned int irq)
{
	struct ht_irq_cfg *cfg = get_irq_data(irq);
	unsigned long flags;
	u32 data;
	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
	pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);
	return data;
}

u32 read_ht_irq_high(unsigned int irq)
{
	struct ht_irq_cfg *cfg = get_irq_data(irq);
	unsigned long flags;
	u32 data;
	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
	pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);
	return data;
}

void mask_ht_irq(unsigned int irq)
{
	struct ht_irq_cfg *cfg;
	unsigned long flags;
	u32 data;

	cfg = get_irq_data(irq);

	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
	pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
	data |= 1;
	pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);
}

void unmask_ht_irq(unsigned int irq)
{
	struct ht_irq_cfg *cfg;
	unsigned long flags;
	u32 data;

	cfg = get_irq_data(irq);

	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
	pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
	data &= ~1;
	pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);
}

/**
 * ht_create_irq - create an irq and attach it to a device.
 * @dev: The hypertransport device to find the irq capability on.
 * @idx: Which of the possible irqs to attach to.
 *
 * ht_create_irq is needs to be called for all hypertransport devices
 * that generate irqs.
 *
 * The irq number of the new irq or a negative error value is returned.
 */
int ht_create_irq(struct pci_dev *dev, int idx)
{
	struct ht_irq_cfg *cfg;
	unsigned long flags;
	u32 data;
	int max_irq;
	int pos;
	int irq;

	pos = pci_find_capability(dev, PCI_CAP_ID_HT);
	while (pos) {
		u8 subtype;
		pci_read_config_byte(dev, pos + 3, &subtype);
		if (subtype == HT_CAPTYPE_IRQ)
			break;
		pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT);
	}
	if (!pos)
		return -EINVAL;

	/* Verify the idx I want to use is in range */
	spin_lock_irqsave(&ht_irq_lock, flags);
	pci_write_config_byte(dev, pos + 2, 1);
	pci_read_config_dword(dev, pos + 4, &data);
	spin_unlock_irqrestore(&ht_irq_lock, flags);

	max_irq = (data >> 16) & 0xff;
	if ( idx > max_irq)
		return -EINVAL;

	cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
	if (!cfg)
		return -ENOMEM;

	cfg->dev = dev;
	cfg->pos = pos;
	cfg->idx = 0x10 + (idx * 2);

	irq = create_irq();
	if (irq < 0) {
		kfree(cfg);
		return -EBUSY;
	}
	set_irq_data(irq, cfg);

	if (arch_setup_ht_irq(irq, dev) < 0) {
		ht_destroy_irq(irq);
		return -EBUSY;
	}

	return irq;
}

/**
 * ht_destroy_irq - destroy an irq created with ht_create_irq
 *
 * This reverses ht_create_irq removing the specified irq from
 * existence.  The irq should be free before this happens.
 */
void ht_destroy_irq(unsigned int irq)
{
	struct ht_irq_cfg *cfg;

	cfg = get_irq_data(irq);
	set_irq_chip(irq, NULL);
	set_irq_data(irq, NULL);
	destroy_irq(irq);

	kfree(cfg);
}

EXPORT_SYMBOL(ht_create_irq);
EXPORT_SYMBOL(ht_destroy_irq);