pmac.c 45.6 KB
Newer Older
L
Linus Torvalds 已提交
1 2
/*
 * Support for IDE interfaces on PowerMacs.
3
 *
L
Linus Torvalds 已提交
4 5 6 7
 * These IDE interfaces are memory-mapped and have a DBDMA channel
 * for doing DMA.
 *
 *  Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt
8
 *  Copyright (C)      2007 Bartlomiej Zolnierkiewicz
L
Linus Torvalds 已提交
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 * Some code taken from drivers/ide/ide-dma.c:
 *
 *  Copyright (c) 1995-1998  Mark Lord
 *
 * TODO: - Use pre-calculated (kauai) timing tables all the time and
 * get rid of the "rounded" tables used previously, so we have the
 * same table format for all controllers and can then just have one
 * big table
 * 
 */
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/ide.h>
#include <linux/notifier.h>
#include <linux/reboot.h>
#include <linux/pci.h>
#include <linux/adb.h>
#include <linux/pmu.h>
#include <linux/scatterlist.h>

#include <asm/prom.h>
#include <asm/io.h>
#include <asm/dbdma.h>
#include <asm/ide.h>
#include <asm/pci-bridge.h>
#include <asm/machdep.h>
#include <asm/pmac_feature.h>
#include <asm/sections.h>
#include <asm/irq.h>

#ifndef CONFIG_PPC64
#include <asm/mediabay.h>
#endif

A
Andrew Morton 已提交
51
#include "../ide-timing.h"
L
Linus Torvalds 已提交
52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239

#undef IDE_PMAC_DEBUG

#define DMA_WAIT_TIMEOUT	50

typedef struct pmac_ide_hwif {
	unsigned long			regbase;
	int				irq;
	int				kind;
	int				aapl_bus_id;
	unsigned			cable_80 : 1;
	unsigned			mediabay : 1;
	unsigned			broken_dma : 1;
	unsigned			broken_dma_warn : 1;
	struct device_node*		node;
	struct macio_dev		*mdev;
	u32				timings[4];
	volatile u32 __iomem *		*kauai_fcr;
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
	/* Those fields are duplicating what is in hwif. We currently
	 * can't use the hwif ones because of some assumptions that are
	 * beeing done by the generic code about the kind of dma controller
	 * and format of the dma table. This will have to be fixed though.
	 */
	volatile struct dbdma_regs __iomem *	dma_regs;
	struct dbdma_cmd*		dma_table_cpu;
#endif
	
} pmac_ide_hwif_t;

enum {
	controller_ohare,	/* OHare based */
	controller_heathrow,	/* Heathrow/Paddington */
	controller_kl_ata3,	/* KeyLargo ATA-3 */
	controller_kl_ata4,	/* KeyLargo ATA-4 */
	controller_un_ata6,	/* UniNorth2 ATA-6 */
	controller_k2_ata6,	/* K2 ATA-6 */
	controller_sh_ata6,	/* Shasta ATA-6 */
};

static const char* model_name[] = {
	"OHare ATA",		/* OHare based */
	"Heathrow ATA",		/* Heathrow/Paddington */
	"KeyLargo ATA-3",	/* KeyLargo ATA-3 (MDMA only) */
	"KeyLargo ATA-4",	/* KeyLargo ATA-4 (UDMA/66) */
	"UniNorth ATA-6",	/* UniNorth2 ATA-6 (UDMA/100) */
	"K2 ATA-6",		/* K2 ATA-6 (UDMA/100) */
	"Shasta ATA-6",		/* Shasta ATA-6 (UDMA/133) */
};

/*
 * Extra registers, both 32-bit little-endian
 */
#define IDE_TIMING_CONFIG	0x200
#define IDE_INTERRUPT		0x300

/* Kauai (U2) ATA has different register setup */
#define IDE_KAUAI_PIO_CONFIG	0x200
#define IDE_KAUAI_ULTRA_CONFIG	0x210
#define IDE_KAUAI_POLL_CONFIG	0x220

/*
 * Timing configuration register definitions
 */

/* Number of IDE_SYSCLK_NS ticks, argument is in nanoseconds */
#define SYSCLK_TICKS(t)		(((t) + IDE_SYSCLK_NS - 1) / IDE_SYSCLK_NS)
#define SYSCLK_TICKS_66(t)	(((t) + IDE_SYSCLK_66_NS - 1) / IDE_SYSCLK_66_NS)
#define IDE_SYSCLK_NS		30	/* 33Mhz cell */
#define IDE_SYSCLK_66_NS	15	/* 66Mhz cell */

/* 133Mhz cell, found in shasta.
 * See comments about 100 Mhz Uninorth 2...
 * Note that PIO_MASK and MDMA_MASK seem to overlap
 */
#define TR_133_PIOREG_PIO_MASK		0xff000fff
#define TR_133_PIOREG_MDMA_MASK		0x00fff800
#define TR_133_UDMAREG_UDMA_MASK	0x0003ffff
#define TR_133_UDMAREG_UDMA_EN		0x00000001

/* 100Mhz cell, found in Uninorth 2. I don't have much infos about
 * this one yet, it appears as a pci device (106b/0033) on uninorth
 * internal PCI bus and it's clock is controlled like gem or fw. It
 * appears to be an evolution of keylargo ATA4 with a timing register
 * extended to 2 32bits registers and a similar DBDMA channel. Other
 * registers seem to exist but I can't tell much about them.
 * 
 * So far, I'm using pre-calculated tables for this extracted from
 * the values used by the MacOS X driver.
 * 
 * The "PIO" register controls PIO and MDMA timings, the "ULTRA"
 * register controls the UDMA timings. At least, it seems bit 0
 * of this one enables UDMA vs. MDMA, and bits 4..7 are the
 * cycle time in units of 10ns. Bits 8..15 are used by I don't
 * know their meaning yet
 */
#define TR_100_PIOREG_PIO_MASK		0xff000fff
#define TR_100_PIOREG_MDMA_MASK		0x00fff000
#define TR_100_UDMAREG_UDMA_MASK	0x0000ffff
#define TR_100_UDMAREG_UDMA_EN		0x00000001


/* 66Mhz cell, found in KeyLargo. Can do ultra mode 0 to 2 on
 * 40 connector cable and to 4 on 80 connector one.
 * Clock unit is 15ns (66Mhz)
 * 
 * 3 Values can be programmed:
 *  - Write data setup, which appears to match the cycle time. They
 *    also call it DIOW setup.
 *  - Ready to pause time (from spec)
 *  - Address setup. That one is weird. I don't see where exactly
 *    it fits in UDMA cycles, I got it's name from an obscure piece
 *    of commented out code in Darwin. They leave it to 0, we do as
 *    well, despite a comment that would lead to think it has a
 *    min value of 45ns.
 * Apple also add 60ns to the write data setup (or cycle time ?) on
 * reads.
 */
#define TR_66_UDMA_MASK			0xfff00000
#define TR_66_UDMA_EN			0x00100000 /* Enable Ultra mode for DMA */
#define TR_66_UDMA_ADDRSETUP_MASK	0xe0000000 /* Address setup */
#define TR_66_UDMA_ADDRSETUP_SHIFT	29
#define TR_66_UDMA_RDY2PAUS_MASK	0x1e000000 /* Ready 2 pause time */
#define TR_66_UDMA_RDY2PAUS_SHIFT	25
#define TR_66_UDMA_WRDATASETUP_MASK	0x01e00000 /* Write data setup time */
#define TR_66_UDMA_WRDATASETUP_SHIFT	21
#define TR_66_MDMA_MASK			0x000ffc00
#define TR_66_MDMA_RECOVERY_MASK	0x000f8000
#define TR_66_MDMA_RECOVERY_SHIFT	15
#define TR_66_MDMA_ACCESS_MASK		0x00007c00
#define TR_66_MDMA_ACCESS_SHIFT		10
#define TR_66_PIO_MASK			0x000003ff
#define TR_66_PIO_RECOVERY_MASK		0x000003e0
#define TR_66_PIO_RECOVERY_SHIFT	5
#define TR_66_PIO_ACCESS_MASK		0x0000001f
#define TR_66_PIO_ACCESS_SHIFT		0

/* 33Mhz cell, found in OHare, Heathrow (& Paddington) and KeyLargo
 * Can do pio & mdma modes, clock unit is 30ns (33Mhz)
 * 
 * The access time and recovery time can be programmed. Some older
 * Darwin code base limit OHare to 150ns cycle time. I decided to do
 * the same here fore safety against broken old hardware ;)
 * The HalfTick bit, when set, adds half a clock (15ns) to the access
 * time and removes one from recovery. It's not supported on KeyLargo
 * implementation afaik. The E bit appears to be set for PIO mode 0 and
 * is used to reach long timings used in this mode.
 */
#define TR_33_MDMA_MASK			0x003ff800
#define TR_33_MDMA_RECOVERY_MASK	0x001f0000
#define TR_33_MDMA_RECOVERY_SHIFT	16
#define TR_33_MDMA_ACCESS_MASK		0x0000f800
#define TR_33_MDMA_ACCESS_SHIFT		11
#define TR_33_MDMA_HALFTICK		0x00200000
#define TR_33_PIO_MASK			0x000007ff
#define TR_33_PIO_E			0x00000400
#define TR_33_PIO_RECOVERY_MASK		0x000003e0
#define TR_33_PIO_RECOVERY_SHIFT	5
#define TR_33_PIO_ACCESS_MASK		0x0000001f
#define TR_33_PIO_ACCESS_SHIFT		0

/*
 * Interrupt register definitions
 */
#define IDE_INTR_DMA			0x80000000
#define IDE_INTR_DEVICE			0x40000000

/*
 * FCR Register on Kauai. Not sure what bit 0x4 is  ...
 */
#define KAUAI_FCR_UATA_MAGIC		0x00000004
#define KAUAI_FCR_UATA_RESET_N		0x00000002
#define KAUAI_FCR_UATA_ENABLE		0x00000001

#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC

/* Rounded Multiword DMA timings
 * 
 * I gave up finding a generic formula for all controller
 * types and instead, built tables based on timing values
 * used by Apple in Darwin's implementation.
 */
struct mdma_timings_t {
	int	accessTime;
	int	recoveryTime;
	int	cycleTime;
};

240
struct mdma_timings_t mdma_timings_33[] =
L
Linus Torvalds 已提交
241 242 243 244 245 246 247 248 249 250 251 252
{
    { 240, 240, 480 },
    { 180, 180, 360 },
    { 135, 135, 270 },
    { 120, 120, 240 },
    { 105, 105, 210 },
    {  90,  90, 180 },
    {  75,  75, 150 },
    {  75,  45, 120 },
    {   0,   0,   0 }
};

253
struct mdma_timings_t mdma_timings_33k[] =
L
Linus Torvalds 已提交
254 255 256 257 258 259 260 261 262 263 264 265
{
    { 240, 240, 480 },
    { 180, 180, 360 },
    { 150, 150, 300 },
    { 120, 120, 240 },
    {  90, 120, 210 },
    {  90,  90, 180 },
    {  90,  60, 150 },
    {  90,  30, 120 },
    {   0,   0,   0 }
};

266
struct mdma_timings_t mdma_timings_66[] =
L
Linus Torvalds 已提交
267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283
{
    { 240, 240, 480 },
    { 180, 180, 360 },
    { 135, 135, 270 },
    { 120, 120, 240 },
    { 105, 105, 210 },
    {  90,  90, 180 },
    {  90,  75, 165 },
    {  75,  45, 120 },
    {   0,   0,   0 }
};

/* KeyLargo ATA-4 Ultra DMA timings (rounded) */
struct {
	int	addrSetup; /* ??? */
	int	rdy2pause;
	int	wrDataSetup;
284
} kl66_udma_timings[] =
L
Linus Torvalds 已提交
285 286 287 288 289 290 291 292 293 294 295 296 297 298
{
    {   0, 180,  120 },	/* Mode 0 */
    {   0, 150,  90 },	/*      1 */
    {   0, 120,  60 },	/*      2 */
    {   0, 90,   45 },	/*      3 */
    {   0, 90,   30 }	/*      4 */
};

/* UniNorth 2 ATA/100 timings */
struct kauai_timing {
	int	cycle_time;
	u32	timing_reg;
};

299
static struct kauai_timing	kauai_pio_timings[] =
L
Linus Torvalds 已提交
300 301 302 303 304 305 306 307 308 309 310
{
	{ 930	, 0x08000fff },
	{ 600	, 0x08000a92 },
	{ 383	, 0x0800060f },
	{ 360	, 0x08000492 },
	{ 330	, 0x0800048f },
	{ 300	, 0x080003cf },
	{ 270	, 0x080003cc },
	{ 240	, 0x0800038b },
	{ 239	, 0x0800030c },
	{ 180	, 0x05000249 },
311 312
	{ 120	, 0x04000148 },
	{ 0	, 0 },
L
Linus Torvalds 已提交
313 314
};

315
static struct kauai_timing	kauai_mdma_timings[] =
L
Linus Torvalds 已提交
316 317 318 319 320 321 322 323 324 325 326 327 328
{
	{ 1260	, 0x00fff000 },
	{ 480	, 0x00618000 },
	{ 360	, 0x00492000 },
	{ 270	, 0x0038e000 },
	{ 240	, 0x0030c000 },
	{ 210	, 0x002cb000 },
	{ 180	, 0x00249000 },
	{ 150	, 0x00209000 },
	{ 120	, 0x00148000 },
	{ 0	, 0 },
};

329
static struct kauai_timing	kauai_udma_timings[] =
L
Linus Torvalds 已提交
330 331 332 333 334 335 336 337 338 339
{
	{ 120	, 0x000070c0 },
	{ 90	, 0x00005d80 },
	{ 60	, 0x00004a60 },
	{ 45	, 0x00003a50 },
	{ 30	, 0x00002a30 },
	{ 20	, 0x00002921 },
	{ 0	, 0 },
};

340
static struct kauai_timing	shasta_pio_timings[] =
L
Linus Torvalds 已提交
341 342 343 344 345 346 347 348 349 350 351
{
	{ 930	, 0x08000fff },
	{ 600	, 0x0A000c97 },
	{ 383	, 0x07000712 },
	{ 360	, 0x040003cd },
	{ 330	, 0x040003cd },
	{ 300	, 0x040003cd },
	{ 270	, 0x040003cd },
	{ 240	, 0x040003cd },
	{ 239	, 0x040003cd },
	{ 180	, 0x0400028b },
352 353
	{ 120	, 0x0400010a },
	{ 0	, 0 },
L
Linus Torvalds 已提交
354 355
};

356
static struct kauai_timing	shasta_mdma_timings[] =
L
Linus Torvalds 已提交
357 358 359 360 361 362 363 364 365 366 367 368 369
{
	{ 1260	, 0x00fff000 },
	{ 480	, 0x00820800 },
	{ 360	, 0x00820800 },
	{ 270	, 0x00820800 },
	{ 240	, 0x00820800 },
	{ 210	, 0x00820800 },
	{ 180	, 0x00820800 },
	{ 150	, 0x0028b000 },
	{ 120	, 0x001ca000 },
	{ 0	, 0 },
};

370
static struct kauai_timing	shasta_udma133_timings[] =
L
Linus Torvalds 已提交
371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390
{
	{ 120   , 0x00035901, },
	{ 90    , 0x000348b1, },
	{ 60    , 0x00033881, },
	{ 45    , 0x00033861, },
	{ 30    , 0x00033841, },
	{ 20    , 0x00033031, },
	{ 15    , 0x00033021, },
	{ 0	, 0 },
};


static inline u32
kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
{
	int i;
	
	for (i=0; table[i].cycle_time; i++)
		if (cycle_time > table[i+1].cycle_time)
			return table[i].timing_reg;
391
	BUG();
L
Linus Torvalds 已提交
392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411
	return 0;
}

/* allow up to 256 DBDMA commands per xfer */
#define MAX_DCMDS		256

/* 
 * Wait 1s for disk to answer on IDE bus after a hard reset
 * of the device (via GPIO/FCR).
 * 
 * Some devices seem to "pollute" the bus even after dropping
 * the BSY bit (typically some combo drives slave on the UDMA
 * bus) after a hard reset. Since we hard reset all drives on
 * KeyLargo ATA66, we have to keep that delay around. I may end
 * up not hard resetting anymore on these and keep the delay only
 * for older interfaces instead (we have to reset when coming
 * from MacOS...) --BenH. 
 */
#define IDE_WAKEUP_DELAY	(1*HZ)

412
static int pmac_ide_init_dma(ide_hwif_t *, const struct ide_port_info *);
L
Linus Torvalds 已提交
413 414 415 416 417 418
static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
static void pmac_ide_selectproc(ide_drive_t *drive);
static void pmac_ide_kauai_selectproc(ide_drive_t *drive);

#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */

419 420
#define PMAC_IDE_REG(x) \
	((void __iomem *)((drive)->hwif->io_ports[IDE_DATA_OFFSET] + (x)))
L
Linus Torvalds 已提交
421 422 423 424 425 426

/*
 * Apply the timings of the proper unit (master/slave) to the shared
 * timing register when selecting that unit. This version is for
 * ASICs with a single timing register
 */
427
static void
L
Linus Torvalds 已提交
428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446
pmac_ide_selectproc(ide_drive_t *drive)
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;

	if (pmif == NULL)
		return;

	if (drive->select.b.unit & 0x01)
		writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));
	else
		writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));
	(void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
}

/*
 * Apply the timings of the proper unit (master/slave) to the shared
 * timing register when selecting that unit. This version is for
 * ASICs with a dual timing register (Kauai)
 */
447
static void
L
Linus Torvalds 已提交
448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467
pmac_ide_kauai_selectproc(ide_drive_t *drive)
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;

	if (pmif == NULL)
		return;

	if (drive->select.b.unit & 0x01) {
		writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
		writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
	} else {
		writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
		writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));
	}
	(void)readl(PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));
}

/*
 * Force an update of controller timing values for a given drive
 */
468
static void
L
Linus Torvalds 已提交
469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495
pmac_ide_do_update_timings(ide_drive_t *drive)
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;

	if (pmif == NULL)
		return;

	if (pmif->kind == controller_sh_ata6 ||
	    pmif->kind == controller_un_ata6 ||
	    pmif->kind == controller_k2_ata6)
		pmac_ide_kauai_selectproc(drive);
	else
		pmac_ide_selectproc(drive);
}

static void
pmac_outbsync(ide_drive_t *drive, u8 value, unsigned long port)
{
	u32 tmp;
	
	writeb(value, (void __iomem *) port);
	tmp = readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
}

/*
 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
 */
496
static void
497
pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
L
Linus Torvalds 已提交
498
{
499
	u32 *timings, t;
L
Linus Torvalds 已提交
500 501 502
	unsigned accessTicks, recTicks;
	unsigned accessTime, recTime;
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
503 504
	unsigned int cycle_time;

L
Linus Torvalds 已提交
505 506 507 508 509
	if (pmif == NULL)
		return;
		
	/* which drive is it ? */
	timings = &pmif->timings[drive->select.b.unit & 0x01];
510
	t = *timings;
L
Linus Torvalds 已提交
511

512
	cycle_time = ide_pio_cycle_time(drive, pio);
L
Linus Torvalds 已提交
513 514 515 516

	switch (pmif->kind) {
	case controller_sh_ata6: {
		/* 133Mhz cell */
517
		u32 tr = kauai_lookup_timing(shasta_pio_timings, cycle_time);
518
		t = (t & ~TR_133_PIOREG_PIO_MASK) | tr;
L
Linus Torvalds 已提交
519 520 521 522 523
		break;
		}
	case controller_un_ata6:
	case controller_k2_ata6: {
		/* 100Mhz cell */
524
		u32 tr = kauai_lookup_timing(kauai_pio_timings, cycle_time);
525
		t = (t & ~TR_100_PIOREG_PIO_MASK) | tr;
L
Linus Torvalds 已提交
526 527 528 529
		break;
		}
	case controller_kl_ata4:
		/* 66Mhz cell */
530
		recTime = cycle_time - ide_pio_timings[pio].active_time
L
Linus Torvalds 已提交
531 532 533 534 535 536 537 538
				- ide_pio_timings[pio].setup_time;
		recTime = max(recTime, 150U);
		accessTime = ide_pio_timings[pio].active_time;
		accessTime = max(accessTime, 150U);
		accessTicks = SYSCLK_TICKS_66(accessTime);
		accessTicks = min(accessTicks, 0x1fU);
		recTicks = SYSCLK_TICKS_66(recTime);
		recTicks = min(recTicks, 0x1fU);
539 540 541
		t = (t & ~TR_66_PIO_MASK) |
			(accessTicks << TR_66_PIO_ACCESS_SHIFT) |
			(recTicks << TR_66_PIO_RECOVERY_SHIFT);
L
Linus Torvalds 已提交
542 543 544 545
		break;
	default: {
		/* 33Mhz cell */
		int ebit = 0;
546
		recTime = cycle_time - ide_pio_timings[pio].active_time
L
Linus Torvalds 已提交
547 548 549 550 551 552 553 554 555 556 557 558 559 560
				- ide_pio_timings[pio].setup_time;
		recTime = max(recTime, 150U);
		accessTime = ide_pio_timings[pio].active_time;
		accessTime = max(accessTime, 150U);
		accessTicks = SYSCLK_TICKS(accessTime);
		accessTicks = min(accessTicks, 0x1fU);
		accessTicks = max(accessTicks, 4U);
		recTicks = SYSCLK_TICKS(recTime);
		recTicks = min(recTicks, 0x1fU);
		recTicks = max(recTicks, 5U) - 4;
		if (recTicks > 9) {
			recTicks--; /* guess, but it's only for PIO0, so... */
			ebit = 1;
		}
561
		t = (t & ~TR_33_PIO_MASK) |
L
Linus Torvalds 已提交
562 563 564
				(accessTicks << TR_33_PIO_ACCESS_SHIFT) |
				(recTicks << TR_33_PIO_RECOVERY_SHIFT);
		if (ebit)
565
			t |= TR_33_PIO_E;
L
Linus Torvalds 已提交
566 567 568 569 570 571 572 573 574
		break;
		}
	}

#ifdef IDE_PMAC_DEBUG
	printk(KERN_ERR "%s: Set PIO timing for mode %d, reg: 0x%08x\n",
		drive->name, pio,  *timings);
#endif	

575
	*timings = t;
576
	pmac_ide_do_update_timings(drive);
L
Linus Torvalds 已提交
577 578 579 580 581 582 583
}

#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC

/*
 * Calculate KeyLargo ATA/66 UDMA timings
 */
584
static int
L
Linus Torvalds 已提交
585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611
set_timings_udma_ata4(u32 *timings, u8 speed)
{
	unsigned rdyToPauseTicks, wrDataSetupTicks, addrTicks;

	if (speed > XFER_UDMA_4)
		return 1;

	rdyToPauseTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].rdy2pause);
	wrDataSetupTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].wrDataSetup);
	addrTicks = SYSCLK_TICKS_66(kl66_udma_timings[speed & 0xf].addrSetup);

	*timings = ((*timings) & ~(TR_66_UDMA_MASK | TR_66_MDMA_MASK)) |
			(wrDataSetupTicks << TR_66_UDMA_WRDATASETUP_SHIFT) | 
			(rdyToPauseTicks << TR_66_UDMA_RDY2PAUS_SHIFT) |
			(addrTicks <<TR_66_UDMA_ADDRSETUP_SHIFT) |
			TR_66_UDMA_EN;
#ifdef IDE_PMAC_DEBUG
	printk(KERN_ERR "ide_pmac: Set UDMA timing for mode %d, reg: 0x%08x\n",
		speed & 0xf,  *timings);
#endif	

	return 0;
}

/*
 * Calculate Kauai ATA/100 UDMA timings
 */
612
static int
L
Linus Torvalds 已提交
613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629
set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
	struct ide_timing *t = ide_timing_find_mode(speed);
	u32 tr;

	if (speed > XFER_UDMA_5 || t == NULL)
		return 1;
	tr = kauai_lookup_timing(kauai_udma_timings, (int)t->udma);
	*ultra_timings = ((*ultra_timings) & ~TR_100_UDMAREG_UDMA_MASK) | tr;
	*ultra_timings = (*ultra_timings) | TR_100_UDMAREG_UDMA_EN;

	return 0;
}

/*
 * Calculate Shasta ATA/133 UDMA timings
 */
630
static int
L
Linus Torvalds 已提交
631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647
set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
	struct ide_timing *t = ide_timing_find_mode(speed);
	u32 tr;

	if (speed > XFER_UDMA_6 || t == NULL)
		return 1;
	tr = kauai_lookup_timing(shasta_udma133_timings, (int)t->udma);
	*ultra_timings = ((*ultra_timings) & ~TR_133_UDMAREG_UDMA_MASK) | tr;
	*ultra_timings = (*ultra_timings) | TR_133_UDMAREG_UDMA_EN;

	return 0;
}

/*
 * Calculate MDMA timings for all cells
 */
648
static void
L
Linus Torvalds 已提交
649
set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
650
		 	u8 speed)
L
Linus Torvalds 已提交
651 652 653
{
	int cycleTime, accessTime = 0, recTime = 0;
	unsigned accessTicks, recTicks;
654
	struct hd_driveid *id = drive->id;
L
Linus Torvalds 已提交
655 656 657 658 659 660 661 662 663
	struct mdma_timings_t* tm = NULL;
	int i;

	/* Get default cycle time for mode */
	switch(speed & 0xf) {
		case 0: cycleTime = 480; break;
		case 1: cycleTime = 150; break;
		case 2: cycleTime = 120; break;
		default:
664 665
			BUG();
			break;
L
Linus Torvalds 已提交
666
	}
667 668 669 670 671

	/* Check if drive provides explicit DMA cycle time */
	if ((id->field_valid & 2) && id->eide_dma_time)
		cycleTime = max_t(int, id->eide_dma_time, cycleTime);

L
Linus Torvalds 已提交
672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782
	/* OHare limits according to some old Apple sources */	
	if ((intf_type == controller_ohare) && (cycleTime < 150))
		cycleTime = 150;
	/* Get the proper timing array for this controller */
	switch(intf_type) {
	        case controller_sh_ata6:
		case controller_un_ata6:
		case controller_k2_ata6:
			break;
		case controller_kl_ata4:
			tm = mdma_timings_66;
			break;
		case controller_kl_ata3:
			tm = mdma_timings_33k;
			break;
		default:
			tm = mdma_timings_33;
			break;
	}
	if (tm != NULL) {
		/* Lookup matching access & recovery times */
		i = -1;
		for (;;) {
			if (tm[i+1].cycleTime < cycleTime)
				break;
			i++;
		}
		cycleTime = tm[i].cycleTime;
		accessTime = tm[i].accessTime;
		recTime = tm[i].recoveryTime;

#ifdef IDE_PMAC_DEBUG
		printk(KERN_ERR "%s: MDMA, cycleTime: %d, accessTime: %d, recTime: %d\n",
			drive->name, cycleTime, accessTime, recTime);
#endif
	}
	switch(intf_type) {
	case controller_sh_ata6: {
		/* 133Mhz cell */
		u32 tr = kauai_lookup_timing(shasta_mdma_timings, cycleTime);
		*timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;
		*timings2 = (*timings2) & ~TR_133_UDMAREG_UDMA_EN;
		}
	case controller_un_ata6:
	case controller_k2_ata6: {
		/* 100Mhz cell */
		u32 tr = kauai_lookup_timing(kauai_mdma_timings, cycleTime);
		*timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;
		*timings2 = (*timings2) & ~TR_100_UDMAREG_UDMA_EN;
		}
		break;
	case controller_kl_ata4:
		/* 66Mhz cell */
		accessTicks = SYSCLK_TICKS_66(accessTime);
		accessTicks = min(accessTicks, 0x1fU);
		accessTicks = max(accessTicks, 0x1U);
		recTicks = SYSCLK_TICKS_66(recTime);
		recTicks = min(recTicks, 0x1fU);
		recTicks = max(recTicks, 0x3U);
		/* Clear out mdma bits and disable udma */
		*timings = ((*timings) & ~(TR_66_MDMA_MASK | TR_66_UDMA_MASK)) |
			(accessTicks << TR_66_MDMA_ACCESS_SHIFT) |
			(recTicks << TR_66_MDMA_RECOVERY_SHIFT);
		break;
	case controller_kl_ata3:
		/* 33Mhz cell on KeyLargo */
		accessTicks = SYSCLK_TICKS(accessTime);
		accessTicks = max(accessTicks, 1U);
		accessTicks = min(accessTicks, 0x1fU);
		accessTime = accessTicks * IDE_SYSCLK_NS;
		recTicks = SYSCLK_TICKS(recTime);
		recTicks = max(recTicks, 1U);
		recTicks = min(recTicks, 0x1fU);
		*timings = ((*timings) & ~TR_33_MDMA_MASK) |
				(accessTicks << TR_33_MDMA_ACCESS_SHIFT) |
				(recTicks << TR_33_MDMA_RECOVERY_SHIFT);
		break;
	default: {
		/* 33Mhz cell on others */
		int halfTick = 0;
		int origAccessTime = accessTime;
		int origRecTime = recTime;
		
		accessTicks = SYSCLK_TICKS(accessTime);
		accessTicks = max(accessTicks, 1U);
		accessTicks = min(accessTicks, 0x1fU);
		accessTime = accessTicks * IDE_SYSCLK_NS;
		recTicks = SYSCLK_TICKS(recTime);
		recTicks = max(recTicks, 2U) - 1;
		recTicks = min(recTicks, 0x1fU);
		recTime = (recTicks + 1) * IDE_SYSCLK_NS;
		if ((accessTicks > 1) &&
		    ((accessTime - IDE_SYSCLK_NS/2) >= origAccessTime) &&
		    ((recTime - IDE_SYSCLK_NS/2) >= origRecTime)) {
            		halfTick = 1;
			accessTicks--;
		}
		*timings = ((*timings) & ~TR_33_MDMA_MASK) |
				(accessTicks << TR_33_MDMA_ACCESS_SHIFT) |
				(recTicks << TR_33_MDMA_RECOVERY_SHIFT);
		if (halfTick)
			*timings |= TR_33_MDMA_HALFTICK;
		}
	}
#ifdef IDE_PMAC_DEBUG
	printk(KERN_ERR "%s: Set MDMA timing for mode %d, reg: 0x%08x\n",
		drive->name, speed & 0xf,  *timings);
#endif	
}
#endif /* #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC */

783
static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
L
Linus Torvalds 已提交
784 785 786 787
{
	int unit = (drive->select.b.unit & 0x01);
	int ret = 0;
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
788
	u32 *timings, *timings2, tl[2];
L
Linus Torvalds 已提交
789 790 791

	timings = &pmif->timings[unit];
	timings2 = &pmif->timings[unit+2];
792 793 794 795 796

	/* Copy timings to local image */
	tl[0] = *timings;
	tl[1] = *timings2;

L
Linus Torvalds 已提交
797
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
798 799 800 801 802 803 804 805 806 807 808 809
	if (speed >= XFER_UDMA_0) {
		if (pmif->kind == controller_kl_ata4)
			ret = set_timings_udma_ata4(&tl[0], speed);
		else if (pmif->kind == controller_un_ata6
			 || pmif->kind == controller_k2_ata6)
			ret = set_timings_udma_ata6(&tl[0], &tl[1], speed);
		else if (pmif->kind == controller_sh_ata6)
			ret = set_timings_udma_shasta(&tl[0], &tl[1], speed);
		else
			ret = -1;
	} else
		set_timings_mdma(drive, pmif->kind, &tl[0], &tl[1], speed);
L
Linus Torvalds 已提交
810 811
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
	if (ret)
812
		return;
813 814 815 816 817

	/* Apply timings to controller */
	*timings = tl[0];
	*timings2 = tl[1];

L
Linus Torvalds 已提交
818 819 820 821 822 823 824
	pmac_ide_do_update_timings(drive);	
}

/*
 * Blast some well known "safe" values to the timing registers at init or
 * wakeup from sleep time, before we do real calculation
 */
825
static void
L
Linus Torvalds 已提交
826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867
sanitize_timings(pmac_ide_hwif_t *pmif)
{
	unsigned int value, value2 = 0;
	
	switch(pmif->kind) {
		case controller_sh_ata6:
			value = 0x0a820c97;
			value2 = 0x00033031;
			break;
		case controller_un_ata6:
		case controller_k2_ata6:
			value = 0x08618a92;
			value2 = 0x00002921;
			break;
		case controller_kl_ata4:
			value = 0x0008438c;
			break;
		case controller_kl_ata3:
			value = 0x00084526;
			break;
		case controller_heathrow:
		case controller_ohare:
		default:
			value = 0x00074526;
			break;
	}
	pmif->timings[0] = pmif->timings[1] = value;
	pmif->timings[2] = pmif->timings[3] = value2;
}

/* Suspend call back, should be called after the child devices
 * have actually been suspended
 */
static int
pmac_ide_do_suspend(ide_hwif_t *hwif)
{
	pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)hwif->hwif_data;
	
	/* We clear the timings */
	pmif->timings[0] = 0;
	pmif->timings[1] = 0;
	
868 869
	disable_irq(pmif->irq);

L
Linus Torvalds 已提交
870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908
	/* The media bay will handle itself just fine */
	if (pmif->mediabay)
		return 0;
	
	/* Kauai has bus control FCRs directly here */
	if (pmif->kauai_fcr) {
		u32 fcr = readl(pmif->kauai_fcr);
		fcr &= ~(KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE);
		writel(fcr, pmif->kauai_fcr);
	}

	/* Disable the bus on older machines and the cell on kauai */
	ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id,
			    0);

	return 0;
}

/* Resume call back, should be called before the child devices
 * are resumed
 */
static int
pmac_ide_do_resume(ide_hwif_t *hwif)
{
	pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)hwif->hwif_data;
	
	/* Hard reset & re-enable controller (do we really need to reset ? -BenH) */
	if (!pmif->mediabay) {
		ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 1);
		ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, pmif->node, pmif->aapl_bus_id, 1);
		msleep(10);
		ppc_md.feature_call(PMAC_FTR_IDE_RESET, pmif->node, pmif->aapl_bus_id, 0);

		/* Kauai has it different */
		if (pmif->kauai_fcr) {
			u32 fcr = readl(pmif->kauai_fcr);
			fcr |= KAUAI_FCR_UATA_RESET_N | KAUAI_FCR_UATA_ENABLE;
			writel(fcr, pmif->kauai_fcr);
		}
909 910

		msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
L
Linus Torvalds 已提交
911 912 913 914 915
	}

	/* Sanitize drive timings */
	sanitize_timings(pmif);

916 917
	enable_irq(pmif->irq);

L
Linus Torvalds 已提交
918 919 920
	return 0;
}

921 922 923 924 925 926 927 928 929 930 931 932
static const struct ide_port_ops pmac_ide_ata6_port_ops = {
	.set_pio_mode		= pmac_ide_set_pio_mode,
	.set_dma_mode		= pmac_ide_set_dma_mode,
	.selectproc		= pmac_ide_kauai_selectproc,
};

static const struct ide_port_ops pmac_ide_port_ops = {
	.set_pio_mode		= pmac_ide_set_pio_mode,
	.set_dma_mode		= pmac_ide_set_dma_mode,
	.selectproc		= pmac_ide_selectproc,
};

933 934
static struct ide_dma_ops pmac_dma_ops;

935
static const struct ide_port_info pmac_port_info = {
936
	.init_dma		= pmac_ide_init_dma,
937
	.chipset		= ide_pmac,
938 939 940
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
	.dma_ops		= &pmac_dma_ops,
#endif
941
	.port_ops		= &pmac_ide_port_ops,
942 943 944 945 946 947 948
	.host_flags		= IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
				  IDE_HFLAG_POST_SET_MODE |
				  IDE_HFLAG_UNMASK_IRQS,
	.pio_mask		= ATA_PIO4,
	.mwdma_mask		= ATA_MWDMA2,
};

L
Linus Torvalds 已提交
949 950 951 952 953 954 955
/*
 * Setup, register & probe an IDE channel driven by this driver, this is
 * called by one of the 2 probe functions (macio or PCI). Note that a channel
 * that ends up beeing free of any device is not kept around by this driver
 * (it is kept in 2.4). This introduce an interface numbering change on some
 * rare machines unfortunately, but it's better this way.
 */
A
Adrian Bunk 已提交
956
static int __devinit
957
pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif, hw_regs_t *hw)
L
Linus Torvalds 已提交
958 959
{
	struct device_node *np = pmif->node;
960
	const int *bidp;
961
	u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
962
	struct ide_port_info d = pmac_port_info;
L
Linus Torvalds 已提交
963 964 965

	pmif->cable_80 = 0;
	pmif->broken_dma = pmif->broken_dma_warn = 0;
966
	if (of_device_is_compatible(np, "shasta-ata")) {
L
Linus Torvalds 已提交
967
		pmif->kind = controller_sh_ata6;
968
		d.port_ops = &pmac_ide_ata6_port_ops;
969 970
		d.udma_mask = ATA_UDMA6;
	} else if (of_device_is_compatible(np, "kauai-ata")) {
L
Linus Torvalds 已提交
971
		pmif->kind = controller_un_ata6;
972
		d.port_ops = &pmac_ide_ata6_port_ops;
973 974
		d.udma_mask = ATA_UDMA5;
	} else if (of_device_is_compatible(np, "K2-UATA")) {
L
Linus Torvalds 已提交
975
		pmif->kind = controller_k2_ata6;
976
		d.port_ops = &pmac_ide_ata6_port_ops;
977 978 979
		d.udma_mask = ATA_UDMA5;
	} else if (of_device_is_compatible(np, "keylargo-ata")) {
		if (strcmp(np->name, "ata-4") == 0) {
L
Linus Torvalds 已提交
980
			pmif->kind = controller_kl_ata4;
981 982
			d.udma_mask = ATA_UDMA4;
		} else
L
Linus Torvalds 已提交
983
			pmif->kind = controller_kl_ata3;
984
	} else if (of_device_is_compatible(np, "heathrow-ata")) {
L
Linus Torvalds 已提交
985
		pmif->kind = controller_heathrow;
986
	} else {
L
Linus Torvalds 已提交
987 988 989 990
		pmif->kind = controller_ohare;
		pmif->broken_dma = 1;
	}

991
	bidp = of_get_property(np, "AAPL,bus-id", NULL);
L
Linus Torvalds 已提交
992 993 994 995 996 997
	pmif->aapl_bus_id =  bidp ? *bidp : 0;

	/* Get cable type from device-tree */
	if (pmif->kind == controller_kl_ata4 || pmif->kind == controller_un_ata6
	    || pmif->kind == controller_k2_ata6
	    || pmif->kind == controller_sh_ata6) {
998
		const char* cable = of_get_property(np, "cable-type", NULL);
L
Linus Torvalds 已提交
999 1000 1001 1002 1003 1004 1005
		if (cable && !strncmp(cable, "80-", 3))
			pmif->cable_80 = 1;
	}
	/* G5's seem to have incorrect cable type in device-tree. Let's assume
	 * they have a 80 conductor cable, this seem to be always the case unless
	 * the user mucked around
	 */
1006 1007
	if (of_device_is_compatible(np, "K2-UATA") ||
	    of_device_is_compatible(np, "shasta-ata"))
L
Linus Torvalds 已提交
1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024
		pmif->cable_80 = 1;

	/* On Kauai-type controllers, we make sure the FCR is correct */
	if (pmif->kauai_fcr)
		writel(KAUAI_FCR_UATA_MAGIC |
		       KAUAI_FCR_UATA_RESET_N |
		       KAUAI_FCR_UATA_ENABLE, pmif->kauai_fcr);

	pmif->mediabay = 0;
	
	/* Make sure we have sane timings */
	sanitize_timings(pmif);

#ifndef CONFIG_PPC64
	/* XXX FIXME: Media bay stuff need re-organizing */
	if (np->parent && np->parent->name
	    && strcasecmp(np->parent->name, "media-bay") == 0) {
1025
#ifdef CONFIG_PMAC_MEDIABAY
1026 1027
		media_bay_set_ide_infos(np->parent, pmif->regbase, pmif->irq,
					hwif);
1028
#endif /* CONFIG_PMAC_MEDIABAY */
L
Linus Torvalds 已提交
1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053
		pmif->mediabay = 1;
		if (!bidp)
			pmif->aapl_bus_id = 1;
	} else if (pmif->kind == controller_ohare) {
		/* The code below is having trouble on some ohare machines
		 * (timing related ?). Until I can put my hand on one of these
		 * units, I keep the old way
		 */
		ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, 0, 1);
	} else
#endif
	{
 		/* This is necessary to enable IDE when net-booting */
		ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 1);
		ppc_md.feature_call(PMAC_FTR_IDE_ENABLE, np, pmif->aapl_bus_id, 1);
		msleep(10);
		ppc_md.feature_call(PMAC_FTR_IDE_RESET, np, pmif->aapl_bus_id, 0);
		msleep(jiffies_to_msecs(IDE_WAKEUP_DELAY));
	}

	/* Setup MMIO ops */
	default_hwif_mmiops(hwif);
       	hwif->OUTBSYNC = pmac_outbsync;

	hwif->hwif_data = pmif;
1054
	ide_init_port_hw(hwif, hw);
1055
	hwif->cbl = pmif->cable_80 ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
L
Linus Torvalds 已提交
1056 1057 1058 1059

	printk(KERN_INFO "ide%d: Found Apple %s controller, bus ID %d%s, irq %d\n",
	       hwif->index, model_name[pmif->kind], pmif->aapl_bus_id,
	       pmif->mediabay ? " (mediabay)" : "", hwif->irq);
1060 1061

	if (pmif->mediabay) {
1062
#ifdef CONFIG_PMAC_MEDIABAY
1063 1064 1065 1066 1067 1068 1069 1070
		if (check_media_bay_by_base(pmif->regbase, MB_CD)) {
#else
		if (1) {
#endif
			hwif->drives[0].noprobe = 1;
			hwif->drives[1].noprobe = 1;
		}
	}
L
Linus Torvalds 已提交
1071 1072

#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
1073 1074 1075
	if (pmif->cable_80 == 0)
		d.udma_mask &= ATA_UDMA2;
#endif
L
Linus Torvalds 已提交
1076

1077
	idx[0] = hwif->index;
L
Linus Torvalds 已提交
1078

1079
	ide_device_add(idx, &d);
1080

L
Linus Torvalds 已提交
1081 1082 1083
	return 0;
}

1084 1085 1086 1087 1088 1089 1090 1091 1092
static void __devinit pmac_ide_init_ports(hw_regs_t *hw, unsigned long base)
{
	int i;

	for (i = 0; i < 8; ++i)
		hw->io_ports[i] = base + i * 0x10;
	hw->io_ports[8] = base + 0x160;
}

L
Linus Torvalds 已提交
1093 1094 1095 1096
/*
 * Attach to a macio probed interface
 */
static int __devinit
1097
pmac_ide_macio_attach(struct macio_dev *mdev, const struct of_device_id *match)
L
Linus Torvalds 已提交
1098 1099 1100 1101 1102
{
	void __iomem *base;
	unsigned long regbase;
	ide_hwif_t *hwif;
	pmac_ide_hwif_t *pmif;
1103
	int irq, rc;
1104
	hw_regs_t hw;
L
Linus Torvalds 已提交
1105

1106 1107 1108 1109
	pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
	if (pmif == NULL)
		return -ENOMEM;

1110 1111
	hwif = ide_find_port();
	if (hwif == NULL) {
L
Linus Torvalds 已提交
1112 1113
		printk(KERN_ERR "ide-pmac: MacIO interface attach with no slot\n");
		printk(KERN_ERR "          %s\n", mdev->ofdev.node->full_name);
1114 1115
		rc = -ENODEV;
		goto out_free_pmif;
L
Linus Torvalds 已提交
1116 1117
	}

1118
	if (macio_resource_count(mdev) == 0) {
1119 1120
		printk(KERN_WARNING "ide-pmac: no address for %s\n",
				    mdev->ofdev.node->full_name);
1121 1122
		rc = -ENXIO;
		goto out_free_pmif;
L
Linus Torvalds 已提交
1123 1124 1125 1126
	}

	/* Request memory resource for IO ports */
	if (macio_request_resource(mdev, 0, "ide-pmac (ports)")) {
1127 1128
		printk(KERN_ERR "ide-pmac: can't request MMIO resource for "
				"%s!\n", mdev->ofdev.node->full_name);
1129 1130
		rc = -EBUSY;
		goto out_free_pmif;
L
Linus Torvalds 已提交
1131 1132 1133 1134 1135 1136 1137 1138
	}
			
	/* XXX This is bogus. Should be fixed in the registry by checking
	 * the kind of host interrupt controller, a bit like gatwick
	 * fixes in irq.c. That works well enough for the single case
	 * where that happens though...
	 */
	if (macio_irq_count(mdev) == 0) {
1139 1140
		printk(KERN_WARNING "ide-pmac: no intrs for device %s, using "
				    "13\n", mdev->ofdev.node->full_name);
1141
		irq = irq_create_mapping(NULL, 13);
L
Linus Torvalds 已提交
1142 1143 1144 1145 1146 1147
	} else
		irq = macio_irq(mdev, 0);

	base = ioremap(macio_resource_start(mdev, 0), 0x400);
	regbase = (unsigned long) base;

1148
	hwif->dev = &mdev->bus->pdev->dev;
L
Linus Torvalds 已提交
1149 1150 1151 1152 1153 1154 1155 1156 1157

	pmif->mdev = mdev;
	pmif->node = mdev->ofdev.node;
	pmif->regbase = regbase;
	pmif->irq = irq;
	pmif->kauai_fcr = NULL;
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
	if (macio_resource_count(mdev) >= 2) {
		if (macio_request_resource(mdev, 1, "ide-pmac (dma)"))
1158 1159 1160
			printk(KERN_WARNING "ide-pmac: can't request DMA "
					    "resource for %s!\n",
					    mdev->ofdev.node->full_name);
L
Linus Torvalds 已提交
1161 1162 1163 1164 1165 1166 1167
		else
			pmif->dma_regs = ioremap(macio_resource_start(mdev, 1), 0x1000);
	} else
		pmif->dma_regs = NULL;
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
	dev_set_drvdata(&mdev->ofdev.dev, hwif);

1168
	memset(&hw, 0, sizeof(hw));
1169
	pmac_ide_init_ports(&hw, pmif->regbase);
1170 1171 1172 1173
	hw.irq = irq;
	hw.dev = &mdev->ofdev.dev;

	rc = pmac_ide_setup_device(pmif, hwif, &hw);
L
Linus Torvalds 已提交
1174 1175 1176 1177
	if (rc != 0) {
		/* The inteface is released to the common IDE layer */
		dev_set_drvdata(&mdev->ofdev.dev, NULL);
		iounmap(base);
1178
		if (pmif->dma_regs) {
L
Linus Torvalds 已提交
1179
			iounmap(pmif->dma_regs);
1180 1181
			macio_release_resource(mdev, 1);
		}
L
Linus Torvalds 已提交
1182
		macio_release_resource(mdev, 0);
1183
		kfree(pmif);
L
Linus Torvalds 已提交
1184 1185 1186
	}

	return rc;
1187 1188 1189 1190

out_free_pmif:
	kfree(pmif);
	return rc;
L
Linus Torvalds 已提交
1191 1192 1193
}

static int
1194
pmac_ide_macio_suspend(struct macio_dev *mdev, pm_message_t mesg)
L
Linus Torvalds 已提交
1195 1196 1197 1198
{
	ide_hwif_t	*hwif = (ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
	int		rc = 0;

1199
	if (mesg.event != mdev->ofdev.dev.power.power_state.event
1200
			&& (mesg.event & PM_EVENT_SLEEP)) {
L
Linus Torvalds 已提交
1201 1202
		rc = pmac_ide_do_suspend(hwif);
		if (rc == 0)
1203
			mdev->ofdev.dev.power.power_state = mesg;
L
Linus Torvalds 已提交
1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214
	}

	return rc;
}

static int
pmac_ide_macio_resume(struct macio_dev *mdev)
{
	ide_hwif_t	*hwif = (ide_hwif_t *)dev_get_drvdata(&mdev->ofdev.dev);
	int		rc = 0;
	
1215
	if (mdev->ofdev.dev.power.power_state.event != PM_EVENT_ON) {
L
Linus Torvalds 已提交
1216 1217
		rc = pmac_ide_do_resume(hwif);
		if (rc == 0)
1218
			mdev->ofdev.dev.power.power_state = PMSG_ON;
L
Linus Torvalds 已提交
1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234
	}

	return rc;
}

/*
 * Attach to a PCI probed interface
 */
static int __devinit
pmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id)
{
	ide_hwif_t *hwif;
	struct device_node *np;
	pmac_ide_hwif_t *pmif;
	void __iomem *base;
	unsigned long rbase, rlen;
1235
	int rc;
1236
	hw_regs_t hw;
L
Linus Torvalds 已提交
1237 1238 1239 1240 1241 1242

	np = pci_device_to_OF_node(pdev);
	if (np == NULL) {
		printk(KERN_ERR "ide-pmac: cannot find MacIO node for Kauai ATA interface\n");
		return -ENODEV;
	}
1243 1244 1245 1246 1247

	pmif = kzalloc(sizeof(*pmif), GFP_KERNEL);
	if (pmif == NULL)
		return -ENOMEM;

1248 1249
	hwif = ide_find_port();
	if (hwif == NULL) {
L
Linus Torvalds 已提交
1250 1251
		printk(KERN_ERR "ide-pmac: PCI interface attach with no slot\n");
		printk(KERN_ERR "          %s\n", np->full_name);
1252 1253
		rc = -ENODEV;
		goto out_free_pmif;
L
Linus Torvalds 已提交
1254 1255 1256
	}

	if (pci_enable_device(pdev)) {
1257 1258
		printk(KERN_WARNING "ide-pmac: Can't enable PCI device for "
				    "%s\n", np->full_name);
1259 1260
		rc = -ENXIO;
		goto out_free_pmif;
L
Linus Torvalds 已提交
1261 1262 1263 1264
	}
	pci_set_master(pdev);
			
	if (pci_request_regions(pdev, "Kauai ATA")) {
1265 1266
		printk(KERN_ERR "ide-pmac: Cannot obtain PCI resources for "
				"%s\n", np->full_name);
1267 1268
		rc = -ENXIO;
		goto out_free_pmif;
L
Linus Torvalds 已提交
1269 1270
	}

1271
	hwif->dev = &pdev->dev;
L
Linus Torvalds 已提交
1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287
	pmif->mdev = NULL;
	pmif->node = np;

	rbase = pci_resource_start(pdev, 0);
	rlen = pci_resource_len(pdev, 0);

	base = ioremap(rbase, rlen);
	pmif->regbase = (unsigned long) base + 0x2000;
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
	pmif->dma_regs = base + 0x1000;
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
	pmif->kauai_fcr = base;
	pmif->irq = pdev->irq;

	pci_set_drvdata(pdev, hwif);

1288
	memset(&hw, 0, sizeof(hw));
1289
	pmac_ide_init_ports(&hw, pmif->regbase);
1290 1291 1292 1293
	hw.irq = pdev->irq;
	hw.dev = &pdev->dev;

	rc = pmac_ide_setup_device(pmif, hwif, &hw);
L
Linus Torvalds 已提交
1294 1295 1296 1297 1298
	if (rc != 0) {
		/* The inteface is released to the common IDE layer */
		pci_set_drvdata(pdev, NULL);
		iounmap(base);
		pci_release_regions(pdev);
1299
		kfree(pmif);
L
Linus Torvalds 已提交
1300 1301 1302
	}

	return rc;
1303 1304 1305 1306

out_free_pmif:
	kfree(pmif);
	return rc;
L
Linus Torvalds 已提交
1307 1308 1309
}

static int
1310
pmac_ide_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
L
Linus Torvalds 已提交
1311 1312 1313 1314
{
	ide_hwif_t	*hwif = (ide_hwif_t *)pci_get_drvdata(pdev);
	int		rc = 0;
	
1315
	if (mesg.event != pdev->dev.power.power_state.event
1316
			&& (mesg.event & PM_EVENT_SLEEP)) {
L
Linus Torvalds 已提交
1317 1318
		rc = pmac_ide_do_suspend(hwif);
		if (rc == 0)
1319
			pdev->dev.power.power_state = mesg;
L
Linus Torvalds 已提交
1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330
	}

	return rc;
}

static int
pmac_ide_pci_resume(struct pci_dev *pdev)
{
	ide_hwif_t	*hwif = (ide_hwif_t *)pci_get_drvdata(pdev);
	int		rc = 0;
	
1331
	if (pdev->dev.power.power_state.event != PM_EVENT_ON) {
L
Linus Torvalds 已提交
1332 1333
		rc = pmac_ide_do_resume(hwif);
		if (rc == 0)
1334
			pdev->dev.power.power_state = PMSG_ON;
L
Linus Torvalds 已提交
1335 1336 1337 1338 1339
	}

	return rc;
}

1340
static struct of_device_id pmac_ide_macio_match[] = 
L
Linus Torvalds 已提交
1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365
{
	{
	.name 		= "IDE",
	},
	{
	.name 		= "ATA",
	},
	{
	.type		= "ide",
	},
	{
	.type		= "ata",
	},
	{},
};

static struct macio_driver pmac_ide_macio_driver = 
{
	.name 		= "ide-pmac",
	.match_table	= pmac_ide_macio_match,
	.probe		= pmac_ide_macio_attach,
	.suspend	= pmac_ide_macio_suspend,
	.resume		= pmac_ide_macio_resume,
};

1366 1367 1368 1369 1370 1371
static const struct pci_device_id pmac_ide_pci_match[] = {
	{ PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA),	0 },
	{ PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100),	0 },
	{ PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100),	0 },
	{ PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_SH_ATA),	0 },
	{ PCI_VDEVICE(APPLE, PCI_DEVICE_ID_APPLE_IPID2_ATA),	0 },
1372
	{},
L
Linus Torvalds 已提交
1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383
};

static struct pci_driver pmac_ide_pci_driver = {
	.name		= "ide-pmac",
	.id_table	= pmac_ide_pci_match,
	.probe		= pmac_ide_pci_attach,
	.suspend	= pmac_ide_pci_suspend,
	.resume		= pmac_ide_pci_resume,
};
MODULE_DEVICE_TABLE(pci, pmac_ide_pci_match);

A
Andrew Morton 已提交
1384
int __init pmac_ide_probe(void)
L
Linus Torvalds 已提交
1385
{
A
Andrew Morton 已提交
1386 1387
	int error;

1388
	if (!machine_is(powermac))
A
Andrew Morton 已提交
1389
		return -ENODEV;
L
Linus Torvalds 已提交
1390 1391

#ifdef CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST
A
Andrew Morton 已提交
1392 1393 1394 1395 1396 1397 1398 1399
	error = pci_register_driver(&pmac_ide_pci_driver);
	if (error)
		goto out;
	error = macio_register_driver(&pmac_ide_macio_driver);
	if (error) {
		pci_unregister_driver(&pmac_ide_pci_driver);
		goto out;
	}
L
Linus Torvalds 已提交
1400
#else
A
Andrew Morton 已提交
1401 1402 1403 1404 1405 1406 1407 1408
	error = macio_register_driver(&pmac_ide_macio_driver);
	if (error)
		goto out;
	error = pci_register_driver(&pmac_ide_pci_driver);
	if (error) {
		macio_unregister_driver(&pmac_ide_macio_driver);
		goto out;
	}
1409
#endif
A
Andrew Morton 已提交
1410 1411
out:
	return error;
L
Linus Torvalds 已提交
1412 1413 1414 1415 1416 1417 1418 1419
}

#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC

/*
 * pmac_ide_build_dmatable builds the DBDMA command list
 * for a transfer and sets the DBDMA channel to point to it.
 */
1420
static int
L
Linus Torvalds 已提交
1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454
pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq)
{
	struct dbdma_cmd *table;
	int i, count = 0;
	ide_hwif_t *hwif = HWIF(drive);
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)hwif->hwif_data;
	volatile struct dbdma_regs __iomem *dma = pmif->dma_regs;
	struct scatterlist *sg;
	int wr = (rq_data_dir(rq) == WRITE);

	/* DMA table is already aligned */
	table = (struct dbdma_cmd *) pmif->dma_table_cpu;

	/* Make sure DMA controller is stopped (necessary ?) */
	writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control);
	while (readl(&dma->status) & RUN)
		udelay(1);

	hwif->sg_nents = i = ide_build_sglist(drive, rq);

	if (!i)
		return 0;

	/* Build DBDMA commands list */
	sg = hwif->sg_table;
	while (i && sg_dma_len(sg)) {
		u32 cur_addr;
		u32 cur_len;

		cur_addr = sg_dma_address(sg);
		cur_len = sg_dma_len(sg);

		if (pmif->broken_dma && cur_addr & (L1_CACHE_BYTES - 1)) {
			if (pmif->broken_dma_warn == 0) {
J
Joe Perches 已提交
1455
				printk(KERN_WARNING "%s: DMA on non aligned address, "
L
Linus Torvalds 已提交
1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478
				       "switching to PIO on Ohare chipset\n", drive->name);
				pmif->broken_dma_warn = 1;
			}
			goto use_pio_instead;
		}
		while (cur_len) {
			unsigned int tc = (cur_len < 0xfe00)? cur_len: 0xfe00;

			if (count++ >= MAX_DCMDS) {
				printk(KERN_WARNING "%s: DMA table too small\n",
				       drive->name);
				goto use_pio_instead;
			}
			st_le16(&table->command, wr? OUTPUT_MORE: INPUT_MORE);
			st_le16(&table->req_count, tc);
			st_le32(&table->phy_addr, cur_addr);
			table->cmd_dep = 0;
			table->xfer_status = 0;
			table->res_count = 0;
			cur_addr += tc;
			cur_len -= tc;
			++table;
		}
J
Jens Axboe 已提交
1479
		sg = sg_next(sg);
L
Linus Torvalds 已提交
1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494
		i--;
	}

	/* convert the last command to an input/output last command */
	if (count) {
		st_le16(&table[-1].command, wr? OUTPUT_LAST: INPUT_LAST);
		/* add the stop command to the end of the list */
		memset(table, 0, sizeof(struct dbdma_cmd));
		st_le16(&table->command, DBDMA_STOP);
		mb();
		writel(hwif->dmatable_dma, &dma->cmdptr);
		return 1;
	}

	printk(KERN_DEBUG "%s: empty DMA table?\n", drive->name);
1495 1496 1497 1498

use_pio_instead:
	ide_destroy_dmatable(drive);

L
Linus Torvalds 已提交
1499 1500 1501 1502
	return 0; /* revert to PIO for this request */
}

/* Teardown mappings after DMA has completed.  */
1503
static void
L
Linus Torvalds 已提交
1504 1505 1506 1507
pmac_ide_destroy_dmatable (ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;

1508 1509
	if (hwif->sg_nents) {
		ide_destroy_dmatable(drive);
L
Linus Torvalds 已提交
1510 1511 1512 1513 1514 1515 1516 1517
		hwif->sg_nents = 0;
	}
}

/*
 * Prepare a DMA transfer. We build the DMA table, adjust the timings for
 * a read on KeyLargo ATA/66 and mark us as waiting for DMA completion
 */
1518
static int
L
Linus Torvalds 已提交
1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547
pmac_ide_dma_setup(ide_drive_t *drive)
{
	ide_hwif_t *hwif = HWIF(drive);
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)hwif->hwif_data;
	struct request *rq = HWGROUP(drive)->rq;
	u8 unit = (drive->select.b.unit & 0x01);
	u8 ata4;

	if (pmif == NULL)
		return 1;
	ata4 = (pmif->kind == controller_kl_ata4);	

	if (!pmac_ide_build_dmatable(drive, rq)) {
		ide_map_sg(drive, rq);
		return 1;
	}

	/* Apple adds 60ns to wrDataSetup on reads */
	if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {
		writel(pmif->timings[unit] + (!rq_data_dir(rq) ? 0x00800000UL : 0),
			PMAC_IDE_REG(IDE_TIMING_CONFIG));
		(void)readl(PMAC_IDE_REG(IDE_TIMING_CONFIG));
	}

	drive->waiting_for_dma = 1;

	return 0;
}

1548
static void
L
Linus Torvalds 已提交
1549 1550 1551 1552 1553 1554 1555 1556 1557 1558
pmac_ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
{
	/* issue cmd to drive */
	ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, NULL);
}

/*
 * Kick the DMA controller into life after the DMA command has been issued
 * to the drive.
 */
1559
static void
L
Linus Torvalds 已提交
1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574
pmac_ide_dma_start(ide_drive_t *drive)
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
	volatile struct dbdma_regs __iomem *dma;

	dma = pmif->dma_regs;

	writel((RUN << 16) | RUN, &dma->control);
	/* Make sure it gets to the controller right now */
	(void)readl(&dma->control);
}

/*
 * After a DMA transfer, make sure the controller is stopped
 */
1575
static int
L
Linus Torvalds 已提交
1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602
pmac_ide_dma_end (ide_drive_t *drive)
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
	volatile struct dbdma_regs __iomem *dma;
	u32 dstat;
	
	if (pmif == NULL)
		return 0;
	dma = pmif->dma_regs;

	drive->waiting_for_dma = 0;
	dstat = readl(&dma->status);
	writel(((RUN|WAKE|DEAD) << 16), &dma->control);
	pmac_ide_destroy_dmatable(drive);
	/* verify good dma status. we don't check for ACTIVE beeing 0. We should...
	 * in theory, but with ATAPI decices doing buffer underruns, that would
	 * cause us to disable DMA, which isn't what we want
	 */
	return (dstat & (RUN|DEAD)) != RUN;
}

/*
 * Check out that the interrupt we got was for us. We can't always know this
 * for sure with those Apple interfaces (well, we could on the recent ones but
 * that's not implemented yet), on the other hand, we don't have shared interrupts
 * so it's not really a problem
 */
1603
static int
L
Linus Torvalds 已提交
1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658
pmac_ide_dma_test_irq (ide_drive_t *drive)
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
	volatile struct dbdma_regs __iomem *dma;
	unsigned long status, timeout;

	if (pmif == NULL)
		return 0;
	dma = pmif->dma_regs;

	/* We have to things to deal with here:
	 * 
	 * - The dbdma won't stop if the command was started
	 * but completed with an error without transferring all
	 * datas. This happens when bad blocks are met during
	 * a multi-block transfer.
	 * 
	 * - The dbdma fifo hasn't yet finished flushing to
	 * to system memory when the disk interrupt occurs.
	 * 
	 */

	/* If ACTIVE is cleared, the STOP command have passed and
	 * transfer is complete.
	 */
	status = readl(&dma->status);
	if (!(status & ACTIVE))
		return 1;
	if (!drive->waiting_for_dma)
		printk(KERN_WARNING "ide%d, ide_dma_test_irq \
			called while not waiting\n", HWIF(drive)->index);

	/* If dbdma didn't execute the STOP command yet, the
	 * active bit is still set. We consider that we aren't
	 * sharing interrupts (which is hopefully the case with
	 * those controllers) and so we just try to flush the
	 * channel for pending data in the fifo
	 */
	udelay(1);
	writel((FLUSH << 16) | FLUSH, &dma->control);
	timeout = 0;
	for (;;) {
		udelay(1);
		status = readl(&dma->status);
		if ((status & FLUSH) == 0)
			break;
		if (++timeout > 100) {
			printk(KERN_WARNING "ide%d, ide_dma_test_irq \
			timeout flushing channel\n", HWIF(drive)->index);
			break;
		}
	}	
	return 1;
}

1659
static void pmac_ide_dma_host_set(ide_drive_t *drive, int on)
L
Linus Torvalds 已提交
1660 1661 1662
{
}

1663 1664
static void
pmac_ide_dma_lost_irq (ide_drive_t *drive)
L
Linus Torvalds 已提交
1665 1666 1667 1668 1669 1670
{
	pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
	volatile struct dbdma_regs __iomem *dma;
	unsigned long status;

	if (pmif == NULL)
1671
		return;
L
Linus Torvalds 已提交
1672 1673 1674 1675 1676 1677
	dma = pmif->dma_regs;

	status = readl(&dma->status);
	printk(KERN_ERR "ide-pmac lost interrupt, dma status: %lx\n", status);
}

1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688
static struct ide_dma_ops pmac_dma_ops = {
	.dma_host_set		= pmac_ide_dma_host_set,
	.dma_setup		= pmac_ide_dma_setup,
	.dma_exec_cmd		= pmac_ide_dma_exec_cmd,
	.dma_start		= pmac_ide_dma_start,
	.dma_end		= pmac_ide_dma_end,
	.dma_test_irq		= pmac_ide_dma_test_irq,
	.dma_timeout		= ide_dma_timeout,
	.dma_lost_irq		= pmac_ide_dma_lost_irq,
};

L
Linus Torvalds 已提交
1689 1690 1691 1692
/*
 * Allocate the data structures needed for using DMA with an interface
 * and fill the proper list of functions pointers
 */
1693 1694
static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
				       const struct ide_port_info *d)
L
Linus Torvalds 已提交
1695
{
1696
	pmac_ide_hwif_t *pmif = (pmac_ide_hwif_t *)hwif->hwif_data;
1697 1698
	struct pci_dev *dev = to_pci_dev(hwif->dev);

L
Linus Torvalds 已提交
1699 1700 1701
	/* We won't need pci_dev if we switch to generic consistent
	 * DMA routines ...
	 */
1702
	if (dev == NULL || pmif->dma_regs == 0)
1703
		return -ENODEV;
L
Linus Torvalds 已提交
1704 1705 1706 1707 1708 1709
	/*
	 * Allocate space for the DBDMA commands.
	 * The +2 is +1 for the stop command and +1 to allow for
	 * aligning the start address to a multiple of 16 bytes.
	 */
	pmif->dma_table_cpu = (struct dbdma_cmd*)pci_alloc_consistent(
1710
		dev,
L
Linus Torvalds 已提交
1711 1712 1713 1714 1715
		(MAX_DCMDS + 2) * sizeof(struct dbdma_cmd),
		&hwif->dmatable_dma);
	if (pmif->dma_table_cpu == NULL) {
		printk(KERN_ERR "%s: unable to allocate DMA command list\n",
		       hwif->name);
1716
		return -ENOMEM;
L
Linus Torvalds 已提交
1717 1718
	}

1719 1720
	hwif->sg_max_nents = MAX_DCMDS;

1721
	return 0;
L
Linus Torvalds 已提交
1722
}
1723 1724 1725 1726 1727 1728
#else
static int __devinit pmac_ide_init_dma(ide_hwif_t *hwif,
				       const struct ide_port_info *d)
{
	return -EOPNOTSUPP;
}
L
Linus Torvalds 已提交
1729
#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
1730 1731

module_init(pmac_ide_probe);
A
Adrian Bunk 已提交
1732 1733

MODULE_LICENSE("GPL");