gpio-pcf857x.c 11.9 KB
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/*
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 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
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 *
 * Copyright (C) 2007 David Brownell
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

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#include <linux/gpio.h>
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#include <linux/i2c.h>
#include <linux/i2c/pcf857x.h>
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#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
#include <linux/workqueue.h>
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static const struct i2c_device_id pcf857x_id[] = {
	{ "pcf8574", 8 },
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	{ "pcf8574a", 8 },
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	{ "pca8574", 8 },
	{ "pca9670", 8 },
	{ "pca9672", 8 },
	{ "pca9674", 8 },
	{ "pcf8575", 16 },
	{ "pca8575", 16 },
	{ "pca9671", 16 },
	{ "pca9673", 16 },
	{ "pca9675", 16 },
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	{ "max7328", 8 },
	{ "max7329", 8 },
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	{ "tca9554", 8 },
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	{ }
};
MODULE_DEVICE_TABLE(i2c, pcf857x_id);

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/*
 * The pcf857x, pca857x, and pca967x chips only expose one read and one
 * write register.  Writing a "one" bit (to match the reset state) lets
 * that pin be used as an input; it's not an open-drain model, but acts
 * a bit like one.  This is described as "quasi-bidirectional"; read the
 * chip documentation for details.
 *
 * Many other I2C GPIO expander chips (like the pca953x models) have
 * more complex register models and more conventional circuitry using
 * push/pull drivers.  They often use the same 0x20..0x27 addresses as
 * pcf857x parts, making the "legacy" I2C driver model problematic.
 */
struct pcf857x {
	struct gpio_chip	chip;
	struct i2c_client	*client;
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	struct mutex		lock;		/* protect 'out' */
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	struct work_struct	work;		/* irq demux work */
	struct irq_domain	*irq_domain;	/* for irq demux  */
	spinlock_t		slock;		/* protect irq demux */
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	unsigned		out;		/* software latch */
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	unsigned		status;		/* current status */
	int			irq;		/* real irq number */
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	int (*write)(struct i2c_client *client, unsigned data);
	int (*read)(struct i2c_client *client);
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};

/*-------------------------------------------------------------------------*/

/* Talk to 8-bit I/O expander */

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static int i2c_write_le8(struct i2c_client *client, unsigned data)
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{
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	return i2c_smbus_write_byte(client, data);
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}

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static int i2c_read_le8(struct i2c_client *client)
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{
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	return (int)i2c_smbus_read_byte(client);
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}

/* Talk to 16-bit I/O expander */

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static int i2c_write_le16(struct i2c_client *client, unsigned word)
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{
	u8 buf[2] = { word & 0xff, word >> 8, };
	int status;

	status = i2c_master_send(client, buf, 2);
	return (status < 0) ? status : 0;
}

static int i2c_read_le16(struct i2c_client *client)
{
	u8 buf[2];
	int status;

	status = i2c_master_recv(client, buf, 2);
	if (status < 0)
		return status;
	return (buf[1] << 8) | buf[0];
}

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/*-------------------------------------------------------------------------*/

static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
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{
	struct pcf857x	*gpio = container_of(chip, struct pcf857x, chip);
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	int		status;
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	mutex_lock(&gpio->lock);
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	gpio->out |= (1 << offset);
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	status = gpio->write(gpio->client, gpio->out);
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	mutex_unlock(&gpio->lock);

	return status;
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}

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static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
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{
	struct pcf857x	*gpio = container_of(chip, struct pcf857x, chip);
	int		value;

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	value = gpio->read(gpio->client);
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	return (value < 0) ? 0 : (value & (1 << offset));
}

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static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
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{
	struct pcf857x	*gpio = container_of(chip, struct pcf857x, chip);
	unsigned	bit = 1 << offset;
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	int		status;
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	mutex_lock(&gpio->lock);
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	if (value)
		gpio->out |= bit;
	else
		gpio->out &= ~bit;
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	status = gpio->write(gpio->client, gpio->out);
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	mutex_unlock(&gpio->lock);

	return status;
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}

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static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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	pcf857x_output(chip, offset, value);
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}

/*-------------------------------------------------------------------------*/

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static int pcf857x_to_irq(struct gpio_chip *chip, unsigned offset)
{
	struct pcf857x *gpio = container_of(chip, struct pcf857x, chip);

	return irq_create_mapping(gpio->irq_domain, offset);
}

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static irqreturn_t pcf857x_irq(int irq, void *data)
{
	struct pcf857x  *gpio = data;
	unsigned long change, i, status, flags;

	status = gpio->read(gpio->client);

	spin_lock_irqsave(&gpio->slock, flags);

	change = gpio->status ^ status;
	for_each_set_bit(i, &change, gpio->chip.ngpio)
		generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
	gpio->status = status;

	spin_unlock_irqrestore(&gpio->slock, flags);

	return IRQ_HANDLED;
}

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static void pcf857x_irq_demux_work(struct work_struct *work)
{
	struct pcf857x *gpio = container_of(work,
					       struct pcf857x,
					       work);
	unsigned long change, i, status, flags;

	status = gpio->read(gpio->client);

	spin_lock_irqsave(&gpio->slock, flags);

	change = gpio->status ^ status;
	for_each_set_bit(i, &change, gpio->chip.ngpio)
		generic_handle_irq(irq_find_mapping(gpio->irq_domain, i));
	gpio->status = status;

	spin_unlock_irqrestore(&gpio->slock, flags);
}

static irqreturn_t pcf857x_irq_demux(int irq, void *data)
{
	struct pcf857x	*gpio = data;

	/*
	 * pcf857x can't read/write data here,
	 * since i2c data access might go to sleep.
	 */
	schedule_work(&gpio->work);

	return IRQ_HANDLED;
}

static int pcf857x_irq_domain_map(struct irq_domain *domain, unsigned int virq,
				 irq_hw_number_t hw)
{
	irq_set_chip_and_handler(virq,
				 &dummy_irq_chip,
				 handle_level_irq);
	return 0;
}

static struct irq_domain_ops pcf857x_irq_domain_ops = {
	.map	= pcf857x_irq_domain_map,
};

static void pcf857x_irq_domain_cleanup(struct pcf857x *gpio)
{
	if (gpio->irq_domain)
		irq_domain_remove(gpio->irq_domain);

}

static int pcf857x_irq_domain_init(struct pcf857x *gpio,
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				   struct i2c_client *client)
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{
	int status;

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	gpio->irq_domain = irq_domain_add_linear(client->dev.of_node,
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						 gpio->chip.ngpio,
						 &pcf857x_irq_domain_ops,
						 NULL);
	if (!gpio->irq_domain)
		goto fail;

	/* enable real irq */
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	status = devm_request_threaded_irq(&client->dev, client->irq,
				NULL, pcf857x_irq, IRQF_ONESHOT |
				IRQF_TRIGGER_FALLING,
				dev_name(&client->dev), gpio);

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	if (status)
		goto fail;

	/* enable gpio_to_irq() */
	INIT_WORK(&gpio->work, pcf857x_irq_demux_work);
	gpio->chip.to_irq	= pcf857x_to_irq;
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	gpio->irq		= client->irq;
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	return 0;

fail:
	pcf857x_irq_domain_cleanup(gpio);
	return -EINVAL;
}

/*-------------------------------------------------------------------------*/

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static int pcf857x_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
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{
	struct pcf857x_platform_data	*pdata;
	struct pcf857x			*gpio;
	int				status;

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	pdata = dev_get_platdata(&client->dev);
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	if (!pdata) {
		dev_dbg(&client->dev, "no platform data\n");
	}
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	/* Allocate, initialize, and register this gpio_chip. */
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	gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
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	if (!gpio)
		return -ENOMEM;

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	mutex_init(&gpio->lock);
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	spin_lock_init(&gpio->slock);
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	gpio->chip.base			= pdata ? pdata->gpio_base : -1;
	gpio->chip.can_sleep		= 1;
	gpio->chip.dev			= &client->dev;
	gpio->chip.owner		= THIS_MODULE;
	gpio->chip.get			= pcf857x_get;
	gpio->chip.set			= pcf857x_set;
	gpio->chip.direction_input	= pcf857x_input;
	gpio->chip.direction_output	= pcf857x_output;
	gpio->chip.ngpio		= id->driver_data;
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	/* enable gpio_to_irq() if platform has settings */
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	if (client->irq) {
		status = pcf857x_irq_domain_init(gpio, client);
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		if (status < 0) {
			dev_err(&client->dev, "irq_domain init failed\n");
			goto fail;
		}
	}

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	/* NOTE:  the OnSemi jlc1562b is also largely compatible with
	 * these parts, notably for output.  It has a low-resolution
	 * DAC instead of pin change IRQs; and its inputs can be the
	 * result of comparators.
	 */

	/* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
	 * 9670, 9672, 9764, and 9764a use quite a variety.
	 *
	 * NOTE: we don't distinguish here between *4 and *4a parts.
	 */
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	if (gpio->chip.ngpio == 8) {
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		gpio->write	= i2c_write_le8;
		gpio->read	= i2c_read_le8;
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		if (!i2c_check_functionality(client->adapter,
				I2C_FUNC_SMBUS_BYTE))
			status = -EIO;

		/* fail if there's no chip present */
		else
			status = i2c_smbus_read_byte(client);

	/* '75/'75c addresses are 0x20..0x27, just like the '74;
	 * the '75c doesn't have a current source pulling high.
	 * 9671, 9673, and 9765 use quite a variety of addresses.
	 *
	 * NOTE: we don't distinguish here between '75 and '75c parts.
	 */
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	} else if (gpio->chip.ngpio == 16) {
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		gpio->write	= i2c_write_le16;
		gpio->read	= i2c_read_le16;
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		if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
			status = -EIO;

		/* fail if there's no chip present */
		else
			status = i2c_read_le16(client);

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	} else {
		dev_dbg(&client->dev, "unsupported number of gpios\n");
		status = -EINVAL;
	}
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	if (status < 0)
		goto fail;

	gpio->chip.label = client->name;

	gpio->client = client;
	i2c_set_clientdata(client, gpio);

	/* NOTE:  these chips have strange "quasi-bidirectional" I/O pins.
	 * We can't actually know whether a pin is configured (a) as output
	 * and driving the signal low, or (b) as input and reporting a low
	 * value ... without knowing the last value written since the chip
	 * came out of reset (if any).  We can't read the latched output.
	 *
	 * In short, the only reliable solution for setting up pin direction
	 * is to do it explicitly.  The setup() method can do that, but it
	 * may cause transient glitching since it can't know the last value
	 * written (some pins may need to be driven low).
	 *
	 * Using pdata->n_latch avoids that trouble.  When left initialized
	 * to zero, our software copy of the "latch" then matches the chip's
	 * all-ones reset state.  Otherwise it flags pins to be driven low.
	 */
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	gpio->out = pdata ? ~pdata->n_latch : ~0;
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	gpio->status = gpio->out;
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	status = gpiochip_add(&gpio->chip);
	if (status < 0)
		goto fail;

	/* Let platform code set up the GPIOs and their users.
	 * Now is the first time anyone could use them.
	 */
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	if (pdata && pdata->setup) {
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		status = pdata->setup(client,
				gpio->chip.base, gpio->chip.ngpio,
				pdata->context);
		if (status < 0)
			dev_warn(&client->dev, "setup --> %d\n", status);
	}

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	dev_info(&client->dev, "probed\n");

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	return 0;

fail:
	dev_dbg(&client->dev, "probe error %d for '%s'\n",
			status, client->name);
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	if (client->irq)
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		pcf857x_irq_domain_cleanup(gpio);

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	return status;
}

static int pcf857x_remove(struct i2c_client *client)
{
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	struct pcf857x_platform_data	*pdata = dev_get_platdata(&client->dev);
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	struct pcf857x			*gpio = i2c_get_clientdata(client);
	int				status = 0;

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	if (pdata && pdata->teardown) {
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		status = pdata->teardown(client,
				gpio->chip.base, gpio->chip.ngpio,
				pdata->context);
		if (status < 0) {
			dev_err(&client->dev, "%s --> %d\n",
					"teardown", status);
			return status;
		}
	}

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	if (client->irq)
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		pcf857x_irq_domain_cleanup(gpio);

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	status = gpiochip_remove(&gpio->chip);
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	if (status)
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		dev_err(&client->dev, "%s --> %d\n", "remove", status);
	return status;
}

static struct i2c_driver pcf857x_driver = {
	.driver = {
		.name	= "pcf857x",
		.owner	= THIS_MODULE,
	},
	.probe	= pcf857x_probe,
	.remove	= pcf857x_remove,
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	.id_table = pcf857x_id,
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};

static int __init pcf857x_init(void)
{
	return i2c_add_driver(&pcf857x_driver);
}
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/* register after i2c postcore initcall and before
 * subsys initcalls that may rely on these GPIOs
 */
subsys_initcall(pcf857x_init);
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static void __exit pcf857x_exit(void)
{
	i2c_del_driver(&pcf857x_driver);
}
module_exit(pcf857x_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Brownell");