Kconfig 9.8 KB
Newer Older
1 2
menu "Platform support"

3
source "arch/powerpc/platforms/powernv/Kconfig"
4 5
source "arch/powerpc/platforms/pseries/Kconfig"
source "arch/powerpc/platforms/chrp/Kconfig"
6
source "arch/powerpc/platforms/512x/Kconfig"
7 8 9 10
source "arch/powerpc/platforms/52xx/Kconfig"
source "arch/powerpc/platforms/powermac/Kconfig"
source "arch/powerpc/platforms/maple/Kconfig"
source "arch/powerpc/platforms/pasemi/Kconfig"
11 12
source "arch/powerpc/platforms/ps3/Kconfig"
source "arch/powerpc/platforms/cell/Kconfig"
13
source "arch/powerpc/platforms/8xx/Kconfig"
14
source "arch/powerpc/platforms/82xx/Kconfig"
15
source "arch/powerpc/platforms/83xx/Kconfig"
16
source "arch/powerpc/platforms/85xx/Kconfig"
17
source "arch/powerpc/platforms/86xx/Kconfig"
18
source "arch/powerpc/platforms/embedded6xx/Kconfig"
19
source "arch/powerpc/platforms/44x/Kconfig"
J
Josh Boyer 已提交
20
source "arch/powerpc/platforms/40x/Kconfig"
21
source "arch/powerpc/platforms/amigaone/Kconfig"
D
David Gibson 已提交
22
source "arch/powerpc/platforms/wsp/Kconfig"
23

24 25
config KVM_GUEST
	bool "KVM Guest support"
26
	default n
27
	select EPAPR_PARAVIRT
28 29 30 31 32 33 34
	---help---
	  This option enables various optimizations for running under the KVM
	  hypervisor. Overhead for the kernel when not running inside KVM should
	  be minimal.

	  In case of doubt, say Y

35 36 37 38 39 40 41 42
config EPAPR_PARAVIRT
	bool "ePAPR para-virtualization support"
	default n
	help
	  Enables ePAPR para-virtualization support for guests.

	  In case of doubt, say Y

43 44
config PPC_NATIVE
	bool
45
	depends on 6xx || PPC64
46 47 48 49 50
	help
	  Support for running natively on the hardware, i.e. without
	  a hypervisor. This option is not user-selectable but should
	  be selected by all platforms that need it.

51 52 53 54 55 56 57
config PPC_OF_BOOT_TRAMPOLINE
	bool "Support booting from Open Firmware or yaboot"
	depends on 6xx || PPC64
	default y
	help
	  Support from booting from Open Firmware or yaboot using an
	  Open Firmware client interface. This enables the kernel to
58
	  communicate with open firmware to retrieve system information
59 60 61 62
	  such as the device tree.

	  In case of doubt, say Y

63 64 65 66 67
config UDBG_RTAS_CONSOLE
	bool "RTAS based debug console"
	depends on PPC_RTAS
	default n

68 69 70 71 72 73 74 75
config PPC_SMP_MUXED_IPI
	bool
	help
	  Select this opton if your platform supports SMP and your
	  interrupt controller provides less than 4 interrupts to each
	  cpu.	This will enable the generic code to multiplex the 4
	  messages on to one ipi.

76 77 78 79 80
config PPC_UDBG_BEAT
	bool "BEAT based debug console"
	depends on PPC_CELLEB
	default n

J
John Rigby 已提交
81 82 83 84
config IPIC
	bool
	default n

85 86 87 88
config MPIC
	bool
	default n

89 90 91
config PPC_EPAPR_HV_PIC
	bool
	default n
92
	select EPAPR_PARAVIRT
93

94 95 96 97
config MPIC_WEIRD
	bool
	default n

98 99 100 101 102 103 104 105
config MPIC_MSGR
	bool "MPIC message register support"
	depends on MPIC
	default n
	help
	  Enables support for the MPIC message registers.  These
	  registers are used for inter-processor communication.

106 107 108 109
config PPC_I8259
	bool
	default n

110 111
config U3_DART
	bool
112
	depends on PPC64
113 114 115 116 117 118 119 120 121 122 123
	default n

config PPC_RTAS
	bool
	default n

config RTAS_ERROR_LOGGING
	bool
	depends on PPC_RTAS
	default n

124 125 126 127 128
config PPC_RTAS_DAEMON
	bool
	depends on PPC_RTAS
	default n

129 130 131 132 133 134 135 136 137 138 139 140 141
config RTAS_PROC
	bool "Proc interface to RTAS"
	depends on PPC_RTAS
	default y

config RTAS_FLASH
	tristate "Firmware flash interface"
	depends on PPC64 && RTAS_PROC

config MMIO_NVRAM
	bool
	default n

142
config MPIC_U3_HT_IRQS
143
	bool
144
	default n
145

146 147 148 149 150 151 152 153 154 155
config MPIC_BROKEN_REGREAD
	bool
	depends on MPIC
	help
	  This option enables a MPIC driver workaround for some chips
	  that have a bug that causes some interrupt source information
	  to not read back properly. It is safe to use on other chips as
	  well, but enabling it uses about 8KB of memory to keep copies
	  of the register contents in software.

156
config IBMVIO
157
	depends on PPC_PSERIES
158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174
	bool
	default y

config IBMEBUS
	depends on PPC_PSERIES
	bool "Support for GX bus based adapters"
	help
	  Bus device driver for GX bus based adapters.

config PPC_MPC106
	bool
	default n

config PPC_970_NAP
	bool
	default n

175 176 177 178
config PPC_P7_NAP
	bool
	default n

179 180 181
config PPC_INDIRECT_IO
	bool
	select GENERIC_IOMAP
182 183 184 185 186 187 188 189

config PPC_INDIRECT_PIO
	bool
	select PPC_INDIRECT_IO

config PPC_INDIRECT_MMIO
	bool
	select PPC_INDIRECT_IO
190

191 192 193
config PPC_IO_WORKAROUNDS
	bool

194 195
source "drivers/cpufreq/Kconfig"

196 197 198
menu "CPU Frequency drivers"
	depends on CPU_FREQ

199 200
config CPU_FREQ_PMAC
	bool "Support for Apple PowerBooks"
201
	depends on ADB_PMU && PPC32
202 203 204 205 206 207 208 209
	select CPU_FREQ_TABLE
	help
	  This adds support for frequency switching on Apple PowerBooks,
	  this currently includes some models of iBook & Titanium
	  PowerBook.

config CPU_FREQ_PMAC64
	bool "Support for some Apple G5s"
210
	depends on PPC_PMAC && PPC64
211 212 213 214
	select CPU_FREQ_TABLE
	help
	  This adds support for frequency switching on Apple iMac G5,
	  and some of the more recent desktop G5 machines as well.
215 216 217

config PPC_PASEMI_CPUFREQ
	bool "Support for PA Semi PWRficient"
218
	depends on PPC_PASEMI
219 220 221 222 223 224
	default y
	select CPU_FREQ_TABLE
	help
	  This adds the support for frequency switching on PA Semi
	  PWRficient processors.

225
endmenu
226

227 228 229 230 231 232
menu "CPUIdle driver"

source "drivers/cpuidle/Kconfig"

endmenu

233 234
config PPC601_SYNC_FIX
	bool "Workarounds for PPC601 bugs"
P
Paul Bolle 已提交
235
	depends on 6xx && PPC_PMAC
236 237 238 239 240 241 242 243 244 245 246 247 248
	help
	  Some versions of the PPC601 (the first PowerPC chip) have bugs which
	  mean that extra synchronization instructions are required near
	  certain instructions, typically those that make major changes to the
	  CPU state.  These extra instructions reduce performance slightly.
	  If you say N here, these extra instructions will not be included,
	  resulting in a kernel which will run faster but may not run at all
	  on some systems with the PPC601 chip.

	  If in doubt, say Y here.

config TAU
	bool "On-chip CPU temperature sensor support"
249
	depends on 6xx
250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290
	help
	  G3 and G4 processors have an on-chip temperature sensor called the
	  'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
	  temperature within 2-4 degrees Celsius. This option shows the current
	  on-die temperature in /proc/cpuinfo if the cpu supports it.

	  Unfortunately, on some chip revisions, this sensor is very inaccurate
	  and in many cases, does not work at all, so don't assume the cpu
	  temp is actually what /proc/cpuinfo says it is.

config TAU_INT
	bool "Interrupt driven TAU driver (DANGEROUS)"
	depends on TAU
	---help---
	  The TAU supports an interrupt driven mode which causes an interrupt
	  whenever the temperature goes out of range. This is the fastest way
	  to get notified the temp has exceeded a range. With this option off,
	  a timer is used to re-check the temperature periodically.

	  However, on some cpus it appears that the TAU interrupt hardware
	  is buggy and can cause a situation which would lead unexplained hard
	  lockups.

	  Unless you are extending the TAU driver, or enjoy kernel/hardware
	  debugging, leave this option off.

config TAU_AVERAGE
	bool "Average high and low temp"
	depends on TAU
	---help---
	  The TAU hardware can compare the temperature to an upper and lower
	  bound.  The default behavior is to show both the upper and lower
	  bound in /proc/cpuinfo. If the range is large, the temperature is
	  either changing a lot, or the TAU hardware is broken (likely on some
	  G4's). If the range is small (around 4 degrees), the temperature is
	  relatively stable.  If you say Y here, a single temperature value,
	  halfway between the upper and lower bounds, will be reported in
	  /proc/cpuinfo.

	  If in doubt, say N here.

291
config QUICC_ENGINE
292
	bool "Freescale QUICC Engine (QE) Support"
293
	depends on FSL_SOC && PPC32
294
	select PPC_LIB_RHEAP
295
	select CRC32
296 297 298 299 300 301
	help
	  The QUICC Engine (QE) is a new generation of communications
	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
	  Selecting this option means that you wish to build a kernel
	  for a machine with a QE coprocessor.

302 303 304 305 306 307 308 309 310
config QE_GPIO
	bool "QE GPIO support"
	depends on QUICC_ENGINE
	select GENERIC_GPIO
	select ARCH_REQUIRE_GPIOLIB
	help
	  Say Y here if you're going to use hardware that connects to the
	  QE GPIOs.

311
config CPM2
312
	bool "Enable support for the CPM2 (Communications Processor Module)"
K
Kumar Gala 已提交
313
	depends on (FSL_SOC_BOOKE && PPC32) || 8260
314
	select CPM
315
	select PPC_LIB_RHEAP
J
John Rigby 已提交
316
	select PPC_PCI_CHOICE
317 318
	select ARCH_REQUIRE_GPIOLIB
	select GENERIC_GPIO
319 320 321 322 323 324
	help
	  The CPM2 (Communications Processor Module) is a coprocessor on
	  embedded CPUs made by Freescale.  Selecting this option means that
	  you wish to build a kernel for a machine with a CPM2 coprocessor
	  on it (826x, 827x, 8560).

325 326
config AXON_RAM
	tristate "Axon DDR2 memory device driver"
327
	depends on PPC_IBM_CELL_BLADE && BLOCK
328 329 330 331 332 333 334
	default m
	help
	  It registers one block device per Axon's DDR2 memory bank found
	  on a system. Block devices are called axonram?, their major and
	  minor numbers are available in /proc/devices, /proc/partitions or
	  in /sys/block/axonram?/dev.

335 336 337
config FSL_ULI1575
	bool
	default n
338
	select GENERIC_ISA_DMA
339 340 341 342 343
	help
	  Supports for the ULI1575 PCIe south bridge that exists on some
	  Freescale reference boards. The boards all use the ULI in pretty
	  much the same way.

344 345 346
config CPM
	bool

347 348 349
config OF_RTC
	bool
	help
350
	  Uses information from the OF or flattened device tree to instantiate
351 352
	  platform devices for direct mapped RTC chips like the DS1742 or DS1743.

353 354 355 356 357 358 359 360 361 362 363
config SIMPLE_GPIO
	bool "Support for simple, memory-mapped GPIO controllers"
	depends on PPC
	select GENERIC_GPIO
	select ARCH_REQUIRE_GPIOLIB
	help
	  Say Y here to support simple, memory-mapped GPIO controllers.
	  These are usually BCSRs used to control board's switches, LEDs,
	  chip-selects, Ethernet/USB PHY's power and various other small
	  on-board peripherals.

364
config MCU_MPC8349EMITX
365
	bool "MPC8349E-mITX MCU driver"
366
	depends on I2C=y && PPC_83xx
367 368 369 370 371 372 373 374
	select GENERIC_GPIO
	select ARCH_REQUIRE_GPIOLIB
	help
	  Say Y here to enable soft power-off functionality on the Freescale
	  boards with the MPC8349E-mITX-compatible MCU chips. This driver will
	  also register MCU GPIOs with the generic GPIO API, so you'll able
	  to use MCU pins as GPIOs.

375 376 377 378
config XILINX_PCI
	bool "Xilinx PCI host bridge support"
	depends on PCI && XILINX_VIRTEX

379
endmenu